TMS320C6743_14 Datasheet, PDF (13/151 Pages) Texas Instruments – Fixed- and Floating-Point Digital Signal Processor

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TMS320C6743
SPRS565D – APRIL 2009 – REVISED JUNE 2014
HEX ADDRESS RANGE
0x0184 4038
0x0184 4040
0x0184 4044
0x0184 4048
0x0184 404C
0x0184 4050 - 0x0184 4FFF
0x0184 5000
0x0184 5004
0x0184 5008
0x0184 500C - 0x0184 5027
0x0184 5028
0x0184 502C - 0x0184 5039
0x0184 5040
0x0184 5044
0x0184 5048
0x0184 8000 – 0x0184 80FF
0x0184 8100 – 0x0184 817F
0x0184 8180 – 0x0184 8187
0x0184 8188 – 0x0184 818F
0x0184 8190 – 0x0184 8197
0x0184 8198 – 0x0184 819F
0x0184 81A0 – 0x0184 81FF
0x0184 8200
0x0184 8204 – 0x0184 82FF
0x0184 8300 – 0x0184 837F
0x0184 8380 – 0x0184 83FF
Table 3-1. C674x Cache Registers (continued)
REGISTER NAME
-
L1DWBAR
L1DWWC
L1DIBAR
L1DIWC
-
L2WB
L2WBINV
L2INV
-
L1PINV
-
L1DWB
L1DWBINV
L1DINV
MAR0 - MAR63
MAR64 – MAR95
MAR96 - MAR97
MAR98 – MAR99
MAR100 – MAR101
MAR102 – MAR103
MAR104 – MAR127
MAR128
MAR129 – MAR191
MAR192 – MAR223
MAR224 – MAR255
DESCRIPTION
Reserved
L1D Block Writeback
L1D Block Writeback
L1D invalidate base address register
L1D invalidate word count register
Reserved
L2 writeback all register
L2 writeback invalidate all register
L2 Global Invalidate without writeback
Reserved
L1P Global Invalidate
Reserved
L1D Global Writeback
L1D Global Writeback with Invalidate
L1D Global Invalidate without writeback
Reserved 0x0000 0000 – 0x3FFF FFFF
Reserved 0x4000 0000 – 0x5FFF FFFF
Memory Attribute Registers for EMIFA Async Data (CS2) 0x6000 0000 –
0x61FF FFFF
Memory Attribute Registers for EMIFA Async Data (CS3) 0x6200 0000 –
0x63FF FFFF
Reserved 0x6400 0000 – 0x65FF FFFF
Reserved 0x6600 0000 – 0x67FF FFFF
Reserved 0x6800 0000 – 0x7FFF FFFF
Reserved 0x8000 0000 – 0x81FF FFFF
Reserved 0x8200 0000 – 0xBFFF FFFF
Memory Attribute Registers for EMIFB SDRAM Data (CS0) 0xC000
0000 – 0xDFFF FFFF
Reserved 0xE000 0000 – 0xFFFF FFFF
Table 3-2. C674x L1/L2 Memory Protection Registers
HEX ADDRESS RANGE
0x0184 A000
0x0184 A004
0x0184 A008
0x0184 A00C - 0x0184 A0FF
0x0184 A100
0x0184 A104
0x0184 A108
0x0184 A10C
0x0184 A110
0x0184 A114
0x0184 A118 - 0x0184 A1FF
REGISTER NAME
L2MPFAR
L2MPFSR
L2MPFCR
-
L2MPLK0
L2MPLK1
L2MPLK2
L2MPLK3
L2MPLKCMD
L2MPLKSTAT
-
0x0184 A200
L2MPPA0
0x0184 A204
L2MPPA1
0x0184 A208
L2MPPA2
DESCRIPTION
L2 memory protection fault address register
L2 memory protection fault status register
L2 memory protection fault command register
Reserved
L2 memory protection lock key bits [31:0]
L2 memory protection lock key bits [63:32]
L2 memory protection lock key bits [95:64]
L2 memory protection lock key bits [127:96]
L2 memory protection lock key command register
L2 memory protection lock key status register
Reserved
L2 memory protection page attribute register 0
(controls memory address 0x0080 0000 - 0x0080 1FFF)
L2 memory protection page attribute register 1
(controls memory address 0x0080 2000 - 0x0080 3FFF)
L2 memory protection page attribute register 2
(controls memory address 0x0080 4000 - 0x0080 5FFF)
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