AM3359_017 Datasheet, PDF (123/253 Pages) Texas Instruments – Sitara Processors

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AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351
SPRS717J – OCTOBER 2011 – REVISED APRIL 2016
7.6.1.3 EMAC and Switch RMII Electrical Data and Timing
(see Figure 7-10)
NO.
1
t_{c(REF_CLK)}
2
t_{w(REF_CLKH)}
3
t_{w(REF_CLKL)}
Table 7-13. Timing Requirements for RMII[x]_REFCLK - RMII Mode
Cycle time, REF_CLK
Pulse duration, REF_CLK high
Pulse duration, REF_CLK low
MIN
TYP
19.999
7
7
MAX
20.001
13
13
UNIT
ns
ns
ns
1
2
RMII[x]_REFCLK
(Input)
3
Figure 7-10. RMII[x]_REFCLK Timing - RMII Mode
Table 7-14. Timing Requirements for RMII[x]_RXD[1:0], RMII[x]_CRS_DV, and RMII[x]_RXER - RMII Mode
(see Figure 7-11)
NO.
MIN
TYP
MAX UNIT
t_{su(RXD-REF_CLK)}
Setup time, RXD[1:0] valid before REF_CLK
1
t_{su(CRS_DV-REF_CLK)}
Setup time, CRS_DV valid before REF_CLK
4
ns
t_{su(RX_ER-REF_CLK)}
Setup time, RX_ER valid before REF_CLK
t_{h(REF_CLK-RXD)}
Hold time RXD[1:0] valid after REF_CLK
2
t_{h(REF_CLK-CRS_DV)}
Hold time, CRS_DV valid after REF_CLK
2
ns
t_{h(REF_CLK-RX_ER)}
Hold time, RX_ER valid after REF_CLK
1
2
RMII[x]_REFCLK (input)
RMII[x]_RXD[1:0], RMII[x]_CRS_DV,
RMII[x]_RXER (inputs)
Figure 7-11. RMII[x]_RXD[1:0], RMII[x]_CRS_DV, RMII[x]_RXER Timing - RMII Mode
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