MSP430FR5972 Datasheet, PDF (122/142 Pages) Texas Instruments – Mixed‑Signal Microcontrollers

MSP430FR5972, MSP430FR59721, MSP430FR5970, MSP430FR5922, MSP430FR59221
MSP430FR5872, MSP430FR58721, MSP430FR5870
SLASE66A – APRIL 2015 – REVISED MAY 2015
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Figure 7-5 shows the recommended decoupling circuit when an external voltage reference is used. The
internal reference module has a maximum drive current as specified in the I_O(VREF+) specification of the
Reference module.
The reference voltage must be a stable voltage for accurate measurements. The capacitor values that are
selected in the general guidelines filter out the high- and low-frequency ripple before the reference voltage
enters the device. In this case, the 10-µF capacitor is used to buffer the reference pin and filter any low-
frequency ripple. A bypass capacitor of 4.7 µF is used to filter out any high frequency noise.
7.2.1.3 Detailed Design Procedure
For additional design information, see the application report Designing With the MSP430FR58xx, FR59xx,
FR68xx, and FR69xx ADC (SLAA624).
7.2.1.4 Layout Guidelines
Component that are shown in the partial schematic (see Figure 7-5) should be placed as close as possible
to the respective device pins. Avoid long traces, because they add additional parasitic capacitance,
inductance, and resistance on the signal.
Avoid routing analog input signals close to a high-frequency pin (for example, a high-frequency PWM),
because the high-frequency switching can be coupled into the analog signal.
If differential mode is used for the ADC12_B, the analog differential input signals must be routed closely
together to minimize the effect of noise on the resulting signal.
122 Applications, Implementation, and Layout
Copyright © 2015, Texas Instruments Incorporated
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Product Folder Links: MSP430FR5972 MSP430FR59721 MSP430FR5970 MSP430FR5922 MSP430FR59221
MSP430FR5872 MSP430FR58721 MSP430FR5870