LMH7324_14 Datasheet, PDF (12/30 Pages) Texas Instruments – Quad 700 ps High Speed Comparator with RSPECL Outputs

LMH7324
SNOSAZ2F – SEPTEMBER 2007 – REVISED JULY 2010
Pin Name
Description
1. V_CCO Positive Supply Output Stage
2. Q
3. Q
4. V_EE
Inverted Output
Output
Negative Supply
5. V_EE
Negative Supply
6. Q
7. Q
8. V_CCO
Output
Inverted Output
Positive Supply Output Stage
9. V_CCI
Positive Supply for Input Stage
10. IN−
Negative Input
11. IN+
Positive Input
12. V_EE
13. V_EE
14. IN+
Negative Supply
Negative Supply
Positive Input
15. IN−
Negative Input
16. V_CCI
17. V_CCO
18. Q
19. Q
20. V_EE
21. V_EE
22. Q
23. Q
24. V_CCO
25. V_CCI
26. IN−
Positive Supply for Input Stage
Positive Supply Output Stage
Inverted Output
Output
Negative Supply
Negative Supply
Output
Inverted Output
Positive Supply Output Stage
Positive Supply for Input Stage
Negative Input
27. IN+
Positive Input
28. V_EE
29. V_EE
30. IN+
Negative Supply
Negative Supply
Positive Input
31. IN−
Negative Input
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PIN DESCRIPTIONS
Part
Comment
A This supply pin is independent of the supply for the input stage. This
allows output levels of different logic families.
A
Output levels are determined by the choice of V_CCOA.
A
Output levels are determined by the choice of V_CCOA.
A
All four V_EE pins are circular connected together via two antiparallel
diodes. (See Figure 16)
B
All four V_EE pins are circular connected together via two antiparallel
diodes. (See Figure 16)
B
Output levels are determined by the choice of V_CCOB.
B
Output levels are determined by the choice of V_CCOB.
B This supply pin is independent of the supply for the input stage. This
allows output levels of different logic families.
B This supply pin is independent of the supply for the output stage.
V_CCIand V_CCO share the same ground pin V_EE.
B
Input for analog voltages between 200 mV below V_EE and 2V below
V_CCI.
B
Input for analog voltages between 200 mV below V_EE and 2V below
V_CCI.
B
All four V_EE pins are circular connected together via two antiparallel
diodes. (See Figure 16)
C
All four V_EE pins are circular connected together via two antiparallel
diodes. (See Figure 16)
C
Input for analog voltages between 200 mV below V_EE and 2V below
V_CCI.
C
Input for analog voltages between 200 mV below V_EE and 2V below
V_CCI.
C
This supply pin is independent of the supply for the output stage. V_CCI
and V_CCO share the same ground pin V_EE.
C This supply pin is independent of the supply for the input stage. This
allows output levels of different logic families.
C
Output levels are determined by the choice of V_CCOC.
C
Output levels are determined by the choice of V_CCOC.
C
All four V_EE pins are circular connected together via two antiparallel
diodes. (See Figure 16)
D
All four V_EE pins are circular connected together via two antiparallel
diodes. (See Figure 16)
D
Output levels are determined by the choice of V_CCOD.
D
Output levels are determined by the choice of V_CCOD.
D This supply pin is independent of the supply for the input stage. This
allows output levels of different logic families.
D
This supply pin is independent of the supply for the output stage. V_CCI
and V_CCO share the same ground pin V_EE.
D
Input for analog voltages between 200 mV below V_EE and 2V below
V_CCI.
D
Input for analog voltages between 200 mV below V_EE and 2V below
V_CCI.
D
All four V_EE pins are circular connected together via two antiparallel
diodes. (See Figure 16)
A
All four V_EE pins are circular connected together via two antiparallel
diodes. (See Figure 16)
A
Input for analog voltages between 200 mV below V_EE and 2V below
V_CCI.
A
Input for analog voltages between 200 mV below V_EE and 2V below
V_CCI.
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