LM4F111C4QR Datasheet, PDF (112/1113 Pages) Texas Instruments – Microcontroller

Cortex-M4 Peripherals
3
3.1
Cortex-M4 Peripherals
This chapter provides information on the Stellaris^® implementation of the Cortex-M4 processor
peripherals, including:
■ SysTick (see page 113)
Provides a simple, 24-bit clear-on-write, decrementing, wrap-on-zero counter with a flexible
control mechanism.
■ Nested Vectored Interrupt Controller (NVIC) (see page 114)
– Facilitates low-latency exception and interrupt handling
– Controls power management
– Implements system control registers
■ System Control Block (SCB) (see page 115)
Provides system implementation information and system control, including configuration, control,
and reporting of system exceptions.
■ Memory Protection Unit (MPU) (see page 115)
Supports the standard ARMv7 Protected Memory System Architecture (PMSA) model. The MPU
provides full support for protection regions, overlapping protection regions, access permissions,
and exporting memory attributes to the system.
■ Floating-Point Unit (FPU) (see page 120)
Fully supports single-precision add, subtract, multiply, divide, multiply and accumulate, and
square root operations. It also provides conversions between fixed-point and floating-point data
formats, and floating-point constant instructions.
Table 3-1 on page 112 shows the address map of the Private Peripheral Bus (PPB). Some peripheral
register regions are split into two address regions, as indicated by two addresses listed.
Table 3-1. Core Peripheral Register Regions
Address
0xE000.E010-0xE000.E01F
0xE000.E100-0xE000.E4EF
0xE000.EF00-0xE000.EF03
0xE000.E008-0xE000.E00F
0xE000.ED00-0xE000.ED3F
0xE000.ED90-0xE000.EDB8
0xE000.EF30-0xE000.EF44
Core Peripheral
System Timer
Nested Vectored Interrupt Controller
System Control Block
Memory Protection Unit
Floating Point Unit
Description (see page ...)
113
114
115
115
120
Functional Description
This chapter provides information on the Stellaris implementation of the Cortex-M4 processor
peripherals: SysTick, NVIC, SCB and MPU.
112
April 25, 2012
Texas Instruments-Advance Information