LM4F111C4QR Datasheet, PDF (1063/1113 Pages) Texas Instruments – Microcontroller

Stellaris^® LM4F111C4QR Microcontroller
21.10 Flash Memory and EEPROM
21.11
Table 21-18. Flash Memory Characteristics
Parameter Parameter Name
Min
Nom
Max
Unit
PE_CYC
Number of guaranteed program/erase cycles before 100,000
failure^a
-
-
cycles
T_RET
Data retention, -40˚C to +85˚C
10
T_PROG64
Program time for double-word-aligned 64 bits of
data^b
30
-
-
50
300
years
µs
T_ERASE
Page erase time, <1k cycles endurance
Page erase time, 100k cycles endurance
2
25
-
ms
-
-
900
ms
Mass erase time, <1k cycles endurance
T_ME
Mass erase time, 100k cycles endurance
70
200
-
ms
-
-
900
ms
a. A program/erase cycle is defined as switching the bits from 1-> 0 -> 1.
b. If programming fewer than 64 bits of data, the programming time is the same. For example, if only 32 bits of data need
to be programmed, the other 32 bits are masked off.
Table 21-19. EEPROM Characteristics^a
Parameter Parameter Name
Min
Nom
Max
Unit
EPE_CYC
Number of guaranteed mass program/erase cycles of a single 500,000
word before failure^b
-
-
cycles
ET_RET
Data retention, -40˚C to +85˚C
Program time for 32 bits of data - space available
10
-
-
-
110
600
years
μs
Program time for 32 bits of data - requires a copy to the copy
-
30
-
ms
buffer, copy buffer has space and less than 10% of EEPROM
endurance used
Program time for 32 bits of data - requires a copy to the copy
-
-
900
ms
buffer, copy buffer has space and greater than 90% of EEPROM
ET_PROG endurance used
Program time for 32 bits of data - requires a copy to the copy
-
60
-
ms
buffer, copy buffer requires an erase and less than 10% of
EEPROM endurance used
Program time for 32 bits of data - requires a copy to the copy
-
-
1800
ms
buffer, copy buffer requires an erase and greater than 90% of
EEPROM endurance used
ET_READ
ET_ME
Read access time
Mass erase time, <1k cycles endurance
Mass erase time, 100k cycles endurance
-
4
- system clocks
70
200
-
ms
-
-
900
ms
a. Because the EEPROM operates as a background task and does not prevent the CPU from executing from Flash memory,
the operation will complete within the maximum time specified provided the EEPROM operation is not stalled by a Flash
memory program or erase operation.
b. A program/erase cycle is defined as switching the bits from 1-> 0 -> 1.
Input/Output Characteristics
Note: All GPIOs are 5-V tolerant, except PB0 and PB1. See “Signal Description” on page 580 for
more information on GPIO configuration.
April 25, 2012
Texas Instruments-Advance Information
1063