CD74ACT297_14 Datasheet, PDF (11/18 Pages) Texas Instruments – DIGITAL PHASE-LOCKED LOOP

From Output
Under Test
CL = 50 pF
(see Note A)
CD74ACT297
DIGITAL PHASE-LOCKED LOOP
SCHS297D – AUGUST 1998 – REVISED JUNE 2002
PARAMETER MEASUREMENT INFORMATION
500 Ω ^S1
500 Ω
2 × VCC
Open
GND
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2 × VCC
GND
LOAD CIRCUIT
Input
tw
10%
90%
1.5 V
tr
90%
3V
1.5 V
10%
0V
tf
VOLTAGE WAVEFORMS
INPUT RISE AND FALL TIMES AND PULSE DURATION
Timing Input
3V
1.5 V
0V
th
tsu
3V
Data Input
1.5 V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Input
1.5 V
3V
1.5 V
0V
tPLH
In-Phase
Output
tPHL
50% VCC
tPHL
VOH
50% VCC
VOL
tPLH
Out-of-Phase
Output
50% VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOH
50% VCC
VOL
Output
Control
(low-level
enabling)
1.5 V
1.5 V
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZL
tPZH
50% VCC
50% VCC
tPLZ
20% VCC
tPHZ
80% VCC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
3V
0V
≈VCC
VOL
VOH
≈0 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 11. Load Circuit and Voltage Waveforms
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