LM3S5P51 Datasheet, PDF (1048/1260 Pages) Texas Instruments – Stellaris® LM3S5P51 Microcontroller

Pulse Width Modulator (PWM)
Bit/Field
7:6
5
4
3
Name
GENAUPD
CMPBUPD
CMPAUPD
LOADUPD
Type
R/W
R/W
R/W
R/W
Reset
0x0
Description
PWMnGENA Update Mode
Value
0x0
0x1
0x2
0x3
Description
Immediate
The PWMnGENA register value is immediately updated
on a write.
Reserved
Locally Synchronized
Updates to the register are reflected to the generator the
next time the counter is 0.
Globally Synchronized
Updates to the register are delayed until the next time
the counter is 0 after a synchronous update has been
requested through the PWMCTL register.
0
Comparator B Update Mode
Value Description
0 Locally Synchronized
Updates to the PWMnCMPB register are reflected to the
generator the next time the counter is 0.
1 Globally Synchronized
Updates to the register are delayed until the next time the
counter is 0 after a synchronous update has been requested
through the PWMCTL register.
0
Comparator A Update Mode
Value Description
0 Locally Synchronized
Updates to the PWMnCMPA register are reflected to the
generator the next time the counter is 0.
1 Globally Synchronized
Updates to the register are delayed until the next time the
counter is 0 after a synchronous update has been requested
through the PWMCTL register.
0
Load Register Update Mode
Value Description
0 Locally Synchronized
Updates to the PWMnLOAD register are reflected to the
generator the next time the counter is 0.
1 Globally Synchronized
Updates to the register are delayed until the next time the
counter is 0 after a synchronous update has been requested
through the PWMCTL register.
1048
Texas Instruments-Production Data
January 21, 2012