LM3S9D96 Datasheet, PDF (1032/1407 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Universal Serial Bus (USB) Controller
Bit/Field
4:0
Name
reserved
Type
RO
Reset
0x0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
OTG B / Device Mode
USB Test Mode (USBTEST)
Base 0x4005.0000
Offset 0x00F
Type R/W, reset 0x00
7
6
5
4
3
2
1
0
reserved FIFOACC FORCEFS
reserved
Type RO R/W1S R/W
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
Bit/Field
7
6
5
Name
reserved
FIFOACC
FORCEFS
Type
RO
R/W1S
R/W
Reset
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
FIFO Access
Value Description
1 Transfers the packet in the endpoint 0 transmit FIFO to the
endpoint 0 receive FIFO.
0 No effect.
This bit is cleared automatically.
Force Full-Speed Mode
Value Description
1 Forces the USB controller into Full-Speed mode upon receiving
a USB RESET.
0 The USB controller operates at Low Speed.
4:0
reserved
RO
0x0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
1032
Texas Instruments-Production Data
January 23, 2012