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BQ24725A_17 Datasheet, PDF (10/47 Pages) Texas Instruments – 1-4 Cell Li+ Battery SMBus Charge Controller with N-Channel Power MOSFET Selector and Advanced Circuit Protection
bq24725A
SLUSAL0A – SEPTEMBER 2011 – REVISED AUGUST 2014
www.ti.com
6.6 Timing Characteristics
4.5 V ≤ VVCC ≤ 24 V, 0°C ≤ TJ ≤ 125°C, typical values are at TA = 25°C, with respect to GND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX
SMBus TIMING CHARACTERISTICS
tR
SCLK/SDATA rise time
tF
SCLK/SDATA fall time
tW(H)
SCLK pulse width high
tW(L)
SCLK Pulse Width Low
tSU(STA)
Setup time for START condition
tH(STA)
START condition hold time after which first clock pulse is generated
tSU(DAT)
Data setup time
tH(DAT)
Data hold time
tSU(STOP)
Setup time for STOP condition
t(BUF)
Bus free time between START and STOP condition
FS(CL)
Clock Frequency
HOST COMMUNICATION FAILURE
ttimeout
SMBus bus release timeout(1)
tBOOT
Deglitch for watchdog reset signal
Watchdog timeout period, ChargeOption() bit [14:13] = 01(2)
1
300
4
50
4.7
4.7
4
250
300
4
4.7
10
100
25
35
10
35
44
53
tWDI
Watchdog timeout period, ChargeOption() bit [14:13] = 10(2)
Watchdog timeout period, ChargeOption() bit [14:13] = 11(2) (Default)
70
88
105
140
175
210
UNIT
μs
ns
μs
μs
μs
μs
ns
ns
µs
μs
kHz
ms
ms
s
s
s
(1) Devices participating in a transfer will timeout when any clock low exceeds the 25ms minimum timeout period. Devices that have
detected a timeout condition must reset the communication no later than the 35ms maximum timeout period. Both a master and a slave
must adhere to the maximum value specified as it incorporates the cumulative stretch limit for both a master (10ms) and a slave (25ms).
(2) User can adjust threshold via SMBus ChargeOption() REG0x12.
6.7 Typical Characteristics
,
CH1: VCC, 10V/div, CH2: ACDET 2V/div, CH3: ACOK, 5V/div
CH4: REGN, 5V/div, 40ms/div
Figure 1. VCC, ACDET, REGN and ACOK Power Up
CH1: ILIM, 1V/div
CH4: inductor current 1A/div, 20ms/div
Figure 2. Charge Enable by ILIM
10
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