DRV8303EVM Datasheet, PDF (1/29 Pages) Texas Instruments – THREE PHASE PRE-DRIVER WITH DUAL CURRENT SHUNT AMPLIFIERS

DRV8303
www.ti.com
SLOS846A – SEPTEMBER 2013 – REVISED OCTOBER 2013
THREE PHASE PRE-DRIVER WITH DUAL CURRENT SHUNT AMPLIFIERS
Check for Samples: DRV8303
FEATURES
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• Operating Supply Voltage 6V–60V
• 2.3A Sink and 1.7A Source Gate Drive Current
Capability
• Integrated Dual Shunt Current Amplifiers With
Adjustable Gain and Offset
• Independent Control of 3 or 6 PWM Inputs
• Bootstrap Gate Driver With 100% Duty Cycle
Support
• Programmable Dead Time to Protect External
FETs from Shoot Through
• Slew Rate Control for EMI Reduction
• Programmable Overcurrent Protection of
External MOSFETs
• Support Both 3.3V and 5V Digital Interface
• SPI Interface
• Thermally Enhanced 48-Pin TSSOP Pad Down
DCA Package
APPLICATIONS
• 3-Phase Brushless DC Motor and Permanent
Magnet Synchronous Motor
• CPAP and Pump
• E-bike, Hospital Bed, Wheel Chair
• Power Drill, Blender, Chopper
DESCRIPTION
The DRV8303 is a gate driver IC for three phase
motor drive applications. It provides three half bridge
drivers, each capable of driving two N-type
MOSFETs, one for the high-side and one for the low
side. It supports up to 2.3A sink and 1.7A source
peak current capability and only needs a single power
supply with a wide range from 6V to 60V. The
DRV8303 uses bootstrap gate drivers with trickle
charge circuitry to support 100% duty cycle. The gate
driver uses automatic hand shaking when high side
FET or low side FET is switching to prevent current
shoot through. Vds of FETs is sensed to protect
external power stage during overcurrent conditions.
The DRV8303 includes two current shunt amplifiers
for accurate current measurement. The current
amplifiers support bi-directional current sensing and
provide an adjustable output offset of up to 3V.
The SPI interface provides detailed fault reporting
and flexible parameter settings such as gain options
for current shunt amplifier and slew rate control of
gate driver.
PVDD
Motor
Controller
PWM
3 or 6
SPI
Error
Reporting
ADC1
Vref
ADC2
DRV8303
Control
and
Protection
Logic
Three-Phase
NMOS Gate
Driver
offset
+
_
offset
+
_
GH_A
GL_A
GH_B
GL_B
GH_C
GL_C
MOTOR
Figure 1. DRV8303 Simplified Application Schematic
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated