AM1810_15 Datasheet, PDF (94/262 Pages) Texas Instruments – AM1810 ARM® Microprocessor For PROFIBUS

AM1810
SPRS709D – NOVEMBER 2010 – REVISED MARCH 2014
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Table 6-13. EDMA3 Channel Controller (EDMA3CC) Registers (continued)
EDMA0 Channel EDMA1 Channel
Controller 0
Controller 0
BYTE ADDRESS BYTE ADDRESS
0x01C0 1000
0x01C0 1008
0x01C0 1010
0x01C0 1018
0x01C0 1020
0x01C0 1028
0x01C0 1030
0x01C0 1038
0x01C0 1040
0x01C0 1050
0x01C0 1058
0x01C0 1060
0x01C0 1068
0x01C0 1070
0x01C0 1078
0x01C0 1080
0x01C0 1084
0x01C0 1088
0x01C0 108C
0x01C0 1090
0x01C0 1094
0x01E3 1000
0x01E3 1008
0x01E3 1010
0x01E3 1018
0x01E3 1020
0x01E3 1028
0x01E3 1030
0x01E3 1038
0x01E3 1040
0x01E3 1050
0x01E3 1058
0x01E3 1060
0x01E3 1068
0x01E3 1070
0x01E3 1078
0x01E3 1080
0x01E3 1084
0x01E3 1088
0x01E3 108C
0x01E3 1090
0x01E3 1094
0x01C0 2000
0x01C0 2008
0x01C0 2010
0x01C0 2018
0x01C0 2020
0x01C0 2028
0x01C0 2030
0x01C0 2038
0x01C0 2040
0x01C0 2050
0x01C0 2058
0x01C0 2060
0x01C0 2068
0x01C0 2070
0x01C0 2078
0x01C0 2080
0x01C0 2084
0x01C0 2088
0x01C0 208C
0x01C0 2090
0x01C0 2094
0x01E3 2000
0x01E3 2008
0x01E3 2010
0x01E3 2018
0x01E3 2020
0x01E3 2028
0x01E3 2030
0x01E3 2038
0x01E3 2040
0x01E3 2050
0x01E3 2058
0x01E3 2060
0x01E3 2068
0x01E3 2070
0x01E3 2078
0x01E3 2080
0x01E3 2084
0x01E3 2088
0x01E3 208C
0x01E3 2090
0x01E3 2094
0x01C0 2200
0x01E3 2200
ACRONYM
REGISTER DESCRIPTION
Global Channel Registers
ER
Event Register
ECR
Event Clear Register
ESR
Event Set Register
CER
Chained Event Register
EER
Event Enable Register
EECR
Event Enable Clear Register
EESR
Event Enable Set Register
SER
Secondary Event Register
SECR
Secondary Event Clear Register
IER
Interrupt Enable Register
IECR
Interrupt Enable Clear Register
IESR
Interrupt Enable Set Register
IPR
Interrupt Pending Register
ICR
Interrupt Clear Register
IEVAL
Interrupt Evaluate Register
QER
QDMA Event Register
QEER
QDMA Event Enable Register
QEECR
QDMA Event Enable Clear Register
QEESR
QDMA Event Enable Set Register
QSER
QDMA Secondary Event Register
QSECR
QDMA Secondary Event Clear Register
Shadow Region 0 Channel Registers
ER
Event Register
ECR
Event Clear Register
ESR
Event Set Register
CER
Chained Event Register
EER
Event Enable Register
EECR
Event Enable Clear Register
EESR
Event Enable Set Register
SER
Secondary Event Register
SECR
Secondary Event Clear Register
IER
Interrupt Enable Register
IECR
Interrupt Enable Clear Register
IESR
Interrupt Enable Set Register
IPR
Interrupt Pending Register
ICR
Interrupt Clear Register
IEVAL
Interrupt Evaluate Register
QER
QDMA Event Register
QEER
QDMA Event Enable Register
QEECR
QDMA Event Enable Clear Register
QEESR
QDMA Event Enable Set Register
QSER
QDMA Secondary Event Register
QSECR
QDMA Secondary Event Clear Register
Shadow Region 1 Channel Registers
ER
Event Register
94
Peripheral Information and Electrical Specifications
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