LP2996LQ Datasheet, PDF (9/26 Pages) Texas Instruments – LP2996-N DDR Termination Regulator

LP2996-N
www.ti.com
SNOSA40J – NOVEMBER 2002 – REVISED MARCH 2013
COMPONENT SELECTIONS
INPUT CAPACITOR
The LP2996-N does not require a capacitor for input stability, but it is recommended for improved performance
during large load transients to prevent the input rail from dropping. The input capacitor should be located as
close as possible to the PVIN pin. Several recommendations exist dependent on the application required. A
typical value recommended for AL electrolytic capacitors is 50 µF. Ceramic capacitors can also be used, a value
in the range of 10 µF with X5R or better would be an ideal choice. The input capacitance can be reduced if the
LP2996-N is placed close to the bulk capacitance from the output of the 2.5V DC-DC converter. If the two supply
rails (AVIN and PVIN) are separated then the 47uF capacitor should be placed as close to possible to the PVIN
rail. An additional 0.1uF ceramic capacitor can be placed on the AVIN rail to prevent excessive noise from
coupling into the device.
OUTPUT CAPACITOR
The LP2996-N has been designed to be insensitive of output capacitor size or ESR (Equivalent Series
Resistance). This allows the flexibility to use any capacitor desired. The choice for output capacitor will be
determined solely on the application and the requirements for load transient response of V_TT. As a general
recommendation the output capacitor should be sized above 100 µF with a low ESR for SSTL applications with
DDR-SDRAM. The value of ESR should be determined by the maximum current spikes expected and the extent
at which the output voltage is allowed to droop. Several capacitor options are available on the market and a few
of these are highlighted below:
AL - It should be noted that many aluminum electrolytics only specify impedance at a frequency of 120 Hz, which
indicates they have poor high frequency performance. Only aluminum electrolytics that have an impedance
specified at a higher frequency (between 20 kHz and 100 kHz) should be used for the LP2996-N. To improve the
ESR several AL electrolytics can be combined in parallel for an overall reduction. An important note to be aware
of is the extent at which the ESR will change over temperature. Aluminum electrolytic capacitors can have their
ESR rapidly increase at cold temperatures.
Ceramic - Ceramic capacitors typically have a low capacitance, in the range of 10 to 100 µF range, but they have
excellent AC performance for bypassing noise because of very low ESR (typically less than 10 mΩ). However,
some dielectric types do not have good capacitance characteristics as a function of voltage and temperature.
Because of the typically low value of capacitance it is recommended to use ceramic capacitors in parallel with
another capacitor such as an aluminum electrolytic. A dielectric of X5R or better is recommended for all ceramic
capacitors.
Hybrid - Several hybrid capacitors such as OS-CON and SP are available from several manufacturers. These
offer a large capacitance while maintaining a low ESR. These are the best solution when size and performance
are critical, although their cost is typically higher than any other capacitor.
Thermal Dissipation
Since the LP2996-N is a linear regulator any current flow from V_TT will result in internal power dissipation
generating heat. To prevent damaging the part from exceeding the maximum allowable junction temperature,
care should be taken to derate the part dependent on the maximum expected ambient temperature and power
dissipation. The maximum allowable internal temperature rise (T_Rmax) can be calculated given the maximum
ambient temperature (T_Amax) of the application and the maximum allowable junction temperature (T_Jmax).
T_Rmax = T_Jmax − T_Amax
(1)
From this equation, the maximum power dissipation (P_Dmax) of the part can be calculated:
P_Dmax = T_Rmax / θ_JA
(2)
The θ_JA of the LP2996-N will be dependent on several variables: the package used; the thickness of copper; the
number of vias and the airflow. For instance, the θ_JA of the SOIC-8 is 163°C/W with the package mounted to a
standard 8x4 2-layer board with 1oz. copper, no airflow, and 0.5W dissipation at room temperature. This value
can be reduced to 151.2°C/W by changing to a 3x4 board with 2 oz. copper that is the JEDEC standard.
Figure 21 shows how the θ_JA varies with airflow for the two boards mentioned.
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