LP2996LQ Datasheet, PDF (2/26 Pages) Texas Instruments – LP2996-N DDR Termination Regulator

LP2996-N
SNOSA40J – NOVEMBER 2002 – REVISED MARCH 2013
Connection Diagram
VSENSE
4 32 1
5
16
N/C
N/C
6
15
VTT
GND
VREF
7
14
VTT
VDDQ
89
10
13
11 12
N/C
Figure 1. WQFN-16 Layout (Top View)
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GND ¹
SD ²
VSENSE ³
VREF ⁴
8 VTT
7 PVIN
6 _AVIN
5 _VDDQ
Figure 2. SOIC-8 Layout
GND ¹
SD ²
VSENSE ³
VREF ⁴
GND
8 VTT
7 PVIN
6 _AVIN
5 _VDDQ
Figure 3. SO PowerPAD-8 Layout
SOIC-8 Pin
or SO
PowerPAD-8
Pin
1
2
3
4
5
6
7
8
-
WQFN Pin
2
4
5
7
8
10
11, 12
14, 15
1, 3, 6, 9, 13, 16
EP
PIN DESCRIPTIONS
Name
Function
GND
SD
VSENSE
VREF
VDDQ
AVIN
PVIN
VTT
NC
EP
Ground
Shutdown
Feedback pin for regulating V_TT.
Buffered internal reference voltage of V_DDQ/2
Input for internal reference equal to V_DDQ/2
Analog input pin
Power input pin
Output voltage for connection to termination resistors
No internal connection
Exposed pad thermal connection. Connect to Ground.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings⁽¹⁾⁽²⁾
AVIN to GND
PVIN to GND
VDDQ ⁽³⁾
Storage Temp. Range
Junction Temperature
SOIC-8 Thermal Resistance (θ_JA)
SO PowerPAD-8 Thermal Resistance (θ_JA)
WQFN-16 Thermal Resistance (θ_JA)
Lead Temperature (Soldering, 10 sec)
ESD Rating⁽⁴⁾
−0.3V to +6V
-0.3V to AVIN
−0.3V to +6V
−65°C to +150°C
150°C
151°C/W
43°C/W
51°C/W
260°C
1kV
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which
the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and test conditions
see Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) VDDQ voltage must be less than 2 x (AVIN - 1) or 6V, whichever is smaller.
(4) The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
2
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