TLK2501 Datasheet, PDF (8/25 Pages) Texas Instruments – 1.5 TO 2.5 GBPS TRANSCEIVER

TLK2501
1.5 TO 2.5 GBPS TRANSCEIVER
SLLS427D − AUGUST 2000 − REVISED JULY 2003
detailed description (continued)
8-bit/10-bit encoder
All true serial interfaces require a method of encoding to insure minimum transition density so that the receiving
PLL has a minimal number of transitions to stay locked on. The encoding scheme maintains the signal dc
balance by keeping the number of ones and zeros the same. This provides good transition density for clock
recovery and improves error checking. The TLK2501 uses the 8-bit/10-bit encoding algorithm that is used by
the fibre channel and the gigabit ethernet. This is transparent to the user, as the TLK2501 internally encodes
and decodes the data such that the user reads and writes actual 16-bit data.
The 8-bit/10-bit encoder converts 8-bit wide data to a 10-bit wide encoded data character to improve its
transmission characteristics. Since the TLK2501 is a 16-bit wide interface, the data is split into two 8-bit wide
bytes for encoding. Each byte is fed into a separate encoder. The encoding is dependant upon two additional
input signals, the TX_EN and TX_ER. When the TX_EN is asserted and the TX_ER deasserted, then the data
bits TXD[0:15] are encoded and transmitted normally. When the TX_EN is deasserted, and TX_ER is asserted,
then the encoder generates a carrier extend consisting of two K23.7 (F7F7) codes. If the TX_EN and the TX_ER
are both asserted, then the encoder generates a K30.7 (FEFE) code. Table 1 provides the transmit data control
decoding. Since the data is transmitted in 20-bit serial words, K codes indicating carrier extend and transmit
error propagation are transmitted as two 10-bit K-codes.
Table 1. Transmit Data Controls
IDLE insertion
TX_EN
0
0
1
1
TX_ER
0
1
0
1
ENCODED 20 BIT OUTPUT
IDLE (< K28.5, D5.6 > or < K28.5, D16.2 >)
Carrier extend (K23.7, K23.7)
Normal data character
Transmit error propagation (K30.7, K30.7)
The encoder inserts the IDLE character set when no payload data is available to be sent. IDLE consists of a
K28.5 (BC) code and either a D5.6 (C5) or a D16.2 (50) character. The K28.5 character is defined by IEEE802.3z
as a pattern consisting of 0011111010 ( a negative number beginning disparity) with the 7 MSBs (0011111)
referred to as the comma character. Since data is latched into the TLK2501 16 bits at a time, this in turn is
converted into two 10-bit codes that are transmitted sequentially. This means IDLE consists of a 20 bits wide
code sequence, that is transmitted during a single GTX_CLK cycle.
PRBS generator
The TLK2501 has a built-in 2⁷-1 PRBS (pseudorandom bit stream) function. When the PRBSEN terminal is
forced high, the PRBS test is enabled. A PRBS is generated and fed into the 10-bit parallel-to-serial converter
input register. Data from the normal input source is ignored during the PRBS mode. The PRBS pattern is then
fed through the transmit circuitry as if it were normal data and sent out to the transmitter. The output can be sent
to a BERT (bit error rate tester), the receiver of another TLK2501, or can be looped back to the receive input.
Since the PRBS is not really random but a predetermined sequence of ones and zeroes, the data can be
captured and checked for errors by a BERT.
parallel-to-serial
The parallel-to-serial shift register takes in the 20-bit wide data word multiplexed from the two parallel 8-bit/10-bit
encoders and converts it to a serial stream. The shift register is clocked on both the rising and falling edge of
the internally generated bit clock, which is 10 times the GTX_CLK input frequency. The LSB (TXD0) is
transmitted first.
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