TLK2501 Datasheet, PDF (6/25 Pages) Texas Instruments – 1.5 TO 2.5 GBPS TRANSCEIVER

TLK2501
1.5 TO 2.5 GBPS TRANSCEIVER
SLLS427D − AUGUST 2000 − REVISED JULY 2003
Terminal Functions (Continued)
TERMINAL
NAME
NO.
RX_CLK
41
RX_ER/
29
PRBS_PASS
TYPE
DESCRIPTION
O† Recovered clock. Output clock that is synchronized to RXD, RX_ER, RX_DV/LOS. RX_CLK is
the recovered serial data rate clock divided by 20. RX_CLK is held low during power-on reset.
O‡ Receive error. When RX_ER and RX_DV/LOS are asserted, indicates that an error was
detected somewhere in the frame presently being output on the receive data bus. When RX_ER
is asserted and RX_DV/LOS is deasserted, indicates that carrier extension data is being
presented (see Table 2). The RX_ER is in high-impedance state during power-on reset.
RX_DV/
LOS
When PRBSEN= low (deasserted), this terminal is used to indicate receive error (RX_ER).
When PRBSEN = high (asserted), this terminal indicates status of the PRBS test results
(High=pass).
30
O‡ Receive data valid. RX_DV/LOS is output by the transceiver to indicate that valid recovered and
decoded data is being output on the receive data bus. RX_DV/LOS is asserted high continuously
from the first recovered word of the frame through the final recovered word and is negated prior
to the first rising edge of RX_CLK that follows the final word (see Table 2). The RX_DV/LOS is
in high-impedance state during power-on reset.
If, during normal operation, the differential signal amplitude on the serial receive terminals is
below 200 mV, RX_DV/LOS is asserted high along with RX_ER and the receive data bus to
indicate a loss of signal condition. If the device is in power-down mode, RX_DV/LOS is the output
of the signal detect circuit and is asserted low when a loss of signal condition is detected.
TESTEN
TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7
TXD8
TXD9
TXD10
TXD11
TXD12
TXD13
TXD14
TXD15
TX_EN
TX_ER
27
I
Test mode enable. This terminal should be left unconnected or tied low.
62
I§ Transmit data bus. These inputs carry the 16-bit parallel data output from a protocol device to
63
the transceiver for encoding, serialization, and transmission. This 16-bit parallel data is clocked
64
into the transceiver on the rising edge of GTX_CLK as shown in Figure 10.
2
3
4
6
7
10
11
12
14
15
16
17
19
20
I§ Transmit enable. TX_EN in combination with TX_ER indicates the protocol device is presenting
data on the transmit data bus for transmission. TX_EN must be high with the first word of the
preamble and remains asserted while all words to be transmitted are presented on the receive
data bus. TX_EN must be negated prior to the first rising edge of GTX_CLK following the final
word of a frame.
22
I§ Transmit error coding. When TX_ER and TX_EN are high, indicates that the transceiver
generates an error somewhere in the frame presently being transferred. When TX_ER is
asserted and TX_EN is deasserted, indicates the protocol device is presenting carrier extension
data. When TX_ER is deasserted with TX_EN asserted, indicates that normal data is being
presented.
VDD
1, 9,
23, 38,
48
Digital logic power. Provides power for all digital circuitry and digital I/O buffers.
VDDA
55, 57
Analog power. VDDA provides a supply reference for the high-speed analog circuits, receiver and
transmitter
† _{Low during power-on reset.}
‡ _{High-impedance during power-on reset}
§ _{Internal pulldown}
6
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