TLK2501 Datasheet, PDF (4/25 Pages) Texas Instruments – 1.5 TO 2.5 GBPS TRANSCEIVER

TLK2501
1.5 TO 2.5 GBPS TRANSCEIVER
SLLS427D − AUGUST 2000 − REVISED JULY 2003
block diagram
LOOPEN
PRBSEN
TX_EN
TX_ER
PRBS
Generator
10
PRBSEN
2:1
MUX
10
Parallel to
Serial
TD(0−15)
8
10
MUX
8
10
10
Bit
Clock
DOUTTXP
DOUTTXN
BIAS
RREF
GTX_CLK
TESTEN
ENABLE
Controls:
PLL,Bias,Rx,
Tx
Multiplying
Clock
Synthesizer
Bit
Clock
PRBSEN
RX_ER
PRBS_PASS
RX_CLK
RX_DV/LOS
RD(0−15)
2:1
MUX
Interpolator and
Clock Recovery
2:1
MUX
PRBSEN
Comma
Detect
8 _{and 8B/10B} 10
Decoding
Comma
8
Detect
10
and 8B/10B
Decoding
PRBS
Verification
Recovered
Clock
1:2
MUX
10
Serial to
Parallel
2:1 ^Data
MUX
Signal Detect
(LOS)
Figure 1. TLK2501 Block Diagram
DINRXP
DINRXN
4
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