GTL2010 Datasheet, PDF (8/15 Pages) NXP Semiconductors – 10-bit GTL Processor Voltage Clamp

GTL2010
10-BIT BIDIRECTIONAL LOW-VOLTAGE TRANSLATOR
SCDS221 – SEPTEMBER 2006
APPLICATION INFORMATION
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Bidirectional Translation
For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage),
the G_REF input must be connected to D_REF and both pins pulled to HIGH-side V_CC through a pullup resistor
(typically 200 kΩ). A filter capacitor on D_REF is recommended. The processor output can be totem pole or open
drain (pullup resistors) and the chipset output can be totem pole or open drain (pullup resistors are required to
pull the Dn outputs to V_CC). However, if either output is totem pole, data must be unidirectional or the outputs
must be 3-statable, and the outputs must be controlled by some direction-control mechanism to prevent
HIGH-to-LOW contentions in either direction. If both outputs are open drain, no direction control is needed. The
opposite side of the reference transistor (S_REF) is connected to the processor core power-supply voltage. When
D_REF is connected through a 200-kΩ resistor to a 3.3-V to 5.5-V V_CC supply and S_REF is set between 1 V to V_CC
1.5 V, the output of each Sn has a maximum output voltage equal to S_REF, and the output of each Dn has a
maximum output voltage equal to V_CC.
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