GTL2010 Datasheet, PDF (3/15 Pages) NXP Semiconductors – 10-bit GTL Processor Voltage Clamp

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GTL2010
10-BIT BIDIRECTIONAL LOW-VOLTAGE TRANSLATOR
SCDS221 – SEPTEMBER 2006
FUNCTION TABLES⁽¹⁾
ABC
HIGH-to-LOW Translation (Assuming Dn is at the Higher Voltage Level)
G_REF ⁽²⁾
H
H
H
L
D_REF
H
H
H
L
S_REF
0V
V_TT ⁽³⁾
V_TT
0 – V_TT
INPUTS
D10–D1
X
H
L
X
OUTPUTS
S10–S1
X
V_TT ⁽⁴⁾
L ⁽⁵⁾
X
TRANSISTOR
Off
On
On
Off
(1) H = HIGH voltage level, L = LOW voltage level, X = don't care
(2) G_REF should be at least 1.5 V higher than S_REF for best translator operation.
(3) V_TT is equal to the S_REF voltage.
(4) Sn is not pulled up or pulled down.
(5) Sn follows the Dn input LOW.
LOW-to-HIGH Translation (Assuming Dn is at the Higher Voltage Level)⁽¹⁾
G_REF ⁽²⁾
H
H
H
L
D_REF
H
H
H
L
S_REF
0V
V_TT ⁽³⁾
V_TT
0 – V_TT
INPUTS
D10–D1
X
V_TT
L
X
OUTPUTS
S10–S1
X
H ⁽⁴⁾
L ⁽⁵⁾
X
TRANSISTOR
Off
Nearly off
On
Off
(1) H = HIGH voltage level, L = LOW voltage level, X = don't care
(2) G_REF should be at least 1.5 V higher than S_REF for best translator operation.
(3) V_TT is equal to the S_REF voltage.
(4) Dn is pulled up to V_CC through an external resistor.
(5) Dn follows the Sn input LOW.
CLAMP SCHEMATIC
D_REF
G_REF
D1
D10
S_REF
S1
S10
SA00647
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