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GTL2010 Datasheet, PDF (2/15 Pages) NXP Semiconductors – 10-bit GTL Processor Voltage Clamp
GTL2010
10-BIT BIDIRECTIONAL LOW-VOLTAGE TRANSLATOR
SCDS221 – SEPTEMBER 2006
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
All transistors in the GTL2010 have the same electrical characteristics, and there is minimal deviation from one
output to another in voltage or propagation delay. This offers superior matching over discrete transistor
voltage-translation solutions where the fabrication of the transistors is not symmetrical. With all transistors being
identical, the reference transistor (SREF/DREF) can be located on any of the other ten matched Sn/Dn transistors,
allowing for easier board layout. The translator transistors with integrated ESD circuitry provides excellent ESD
protection.
ORDERING INFORMATION
TA
–40°C to 85°C
PACKAGE (1)
TSSOP – PW
Tape and reel
ORDERABLE PART NUMBER
SN74GTL2010PWR
TOP-SIDE MARKING
GK2010
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
PIN NO.
1
2
3–12
13–22
23
24
PIN DESCRIPTION
NAME
GND
SREF
Sn
Dn
DREF
GREF
DESCRIPTION
Ground (0 V)
Source of reference transistor
Ports S1–10
Ports D10–D1
Drain of reference transistor
Gate of reference transistor
2
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