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DS92LX2121 Datasheet, PDF (8/42 Pages) National Semiconductor (TI) – 10 - 50 MHz Channel Link III Serializer and Deserializer with Embedded Bi-Directional Control Channel
DS92LX2121, DS92LX2122
SNLS330I – MAY 2010 – REVISED APRIL 2013
www.ti.com
Serializer Electrical Characteristics(1)(2)(3) (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
IOS
Parameter
Output Short Circuit Current
Conditions
Min
VOUT = 0V (4)
Serializer
GPO Outputs
Deserializer
LVCMOS
Outputs
Typ
Max Units
-11
mA
-20
IOZ
TRI-STATE Output Current
RPWDNB = 0V, Register
-20
VOUT = 0V or VDD Address
(OSS_SEL =
0)
±1
+20
µA
CML DRIVER DC SPECIFICATIONS (DOUT+, DOUT-)
|VOD|
Output Differential Voltage
RT = 100Ω
(SeeFigure 9)
268
340
412
mV
ΔVOD
VOS
ΔVOS
IOS
Output Differential Voltage Unbalance RL = 100Ω
Output Differential Offset Voltage
RL = 100Ω (See
Figure 9)
Offset Voltage Unbalance
RL = 100Ω
Output Short Circuit Current
DOUT+/- = 0V,
PDB = L or H (4)
1
50
mV
VDD (MIN) - VOD VDD - VOD VDD (MAX) -
(MAX)
VOD (MIN)
V
1
50
mV
-27
mA
RT
Differential Internal Termination
Differential across
Resistance
DOUT+ and
DOUT-
80
100
120
Ω
CML RECEIVER DC SPECIFICATIONS (RIN+, RIN-)
VTH
VTL
Differential Threshold High Voltage
Differential Threshold Low Voltage
VCM = 1.2V
VIN
Differential Input Voltage Range
RIN+ - RIN-
IIN
Input Current
VIN = VDD or 0 V,
VDD = 1.89 V
RT
Differential Internal Termination
Differential across
Resistance
RIN+ and RIN-
+90
mV
-90
180
mV
-20
±1
+20
µA
80
100
120
Ω
SER/DES SUPPLY CURRENT *DIGITAL, PLL,
AND ANALOG VDDS
RT = 100Ω
WORST CASE
VDDn = 1.89
Serializer (Tx)
pattern (See
V
IDDT
Total Supply Current Mode (includes Figure 6)
f = 50 MHz
load current)
Default
RT = 100Ω
Registers
RANDOM pattern
62
90
mA
55
IDDIOT
Serializer (Tx)
VDDIO Supply Current (includes load
current)
RT = 100Ω
WORST CASE
pattern (See
Figure 6)
VDDIO = 1.89
V
PCLK = 50
MHz
Default
Registers
VDDIO = 3.6 V
PCLK = 50
MHz
Default
Registers
2
5
mA
7
15
IDDTZ
IDDIOTZ
Serializer (Tx) Supply Current Power-
down
PDB = 0V; All
other LVCMOS
Inputs = 0V
VDD = 1.89 V
VDDIO = 1.89
V
VDDIO = 3.6 V
370
775
55
125
µA
65
135
(4) Specification is guaranteed by characterization and is not tested in production.
8
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