DS92LX2121 Datasheet, PDF (2/42 Pages) National Semiconductor (TI) – 10 - 50 MHz Channel Link III Serializer and Deserializer with Embedded Bi-Directional Control Channel

DS92LX2121, DS92LX2122
SNLS330I – MAY 2010 – REVISED APRIL 2013
Typical Application Diagram
Parallel
Data In
18+3
Graphics
Controller,
Camera
4
GPO
2
DS92LX2121
Serial
Control Bus
Serializer
Block Diagrams
Channel Link III
Back Channel
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Parallel
Data Out
18+3
4
DS92LX2122
Display
Module, Frame
GPI
Grabber
2
Serial
Deserializer ^{Control Bus}
Data [17:0], ²¹
Control [2:0]
4
GPO[3:0]
PCLK
PDB
M/S
PLL
Clock
Gen
Timing
and
Control
R_T R_T DOUT+
RIN+ ^RT ^RT
DOUT-
RIN-
PDB
BISTEN
M/S
CDR
Clock
Gen
Timing
and
Control
21 _{Data [17:0],}
Control [2:0]
4
GPI[3:0]
PCLK
LOCK
PASS
SDA
SCL
CAD
SDA
SCL
CAD
DS92LX2121 - SERIALIZER
DS92LX2122 - DESERIALIZER
Figure 1. Block Diagram
Graphics
Controller
---
Video
Processor
--
Camera
PC
R[5:0]
G[5:0]
B[5:0]
VS
HS
DE
DS92LX2121
Serializer
DS92LX2122
Deserializer
Channel Link III
PCLK
PDB
M/S
GPO[3:0]
SDA
SCL
PLL
Config.
I²C
Config.
I²C
R[5:0]
G[5:0]
B[5:0]
VS
HS
DE
PCLK
PDB
M/S
BISTEN
GPI[3:0]
SDA
SCL
Timing
Controller
--
Display
--
Frame Grabber
PC
Figure 2. Application Block Diagram
2
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