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| DS92LX2121 Datasheet, PDF (32/42 Pages) National Semiconductor (TI) – 10 - 50 MHz Channel Link III Serializer and Deserializer with Embedded Bi-Directional Control Channel | |||
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DS92LX2121, DS92LX2122
SNLS330I â MAY 2010 â REVISED APRIL 2013
Figure 36 shows a typical connection of the DS92LX2122 Deserializer.
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1.8V
C13 C11
FB1
DS92LX2122 (DES)
VDDIO
VDDD
C3
VDDIO1
C8
FB6 C12 C14
VDDR
FB2
C4
VDDIO2
C9
FB3
C5
FB4
C15 C6
Serial
Channel
Link III
Interface
FB5
C16 C7
C1
C2
LVCMOS
Control
Interface
TP_A
TP_B
VDDSSCG
VDDPLL
VDDCML
RIN+
RIN-
RES_PIN38
RES_PIN39
MODE
PDB
VDDIO3
C10
ROUT0
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUT6
ROUT7
ROUT8
ROUT9
ROUT10
ROUT11
ROUT12
ROUT13
ROUT14
ROUT15
ROUT16
ROUT17
ROUT18
ROUT19
ROUT20
PCLK
LVCMOS
Parallel
Bus
VDDIO
RPU
RPU
I2C
Bus
Interface
FB7
FB8
Optional
SCL
SDA
C17
C18
NOTE:
Optional
C1 - C2 = 0.1 PF (50 WV)
C3 - C12 = 0.1 PF
C13 - C16 = 4.7 PF
C17 - C18 = >100 pF
RPU = 1 k: to 4.7 k:
RID (see ID[x] Resistor Value Table)
FB1 - FB8: Impedance = 1 k: (@ 100 MHz)
low DC resistance (<1:)
RES_PIN46
DAP (GND)
GPI[0]
GPI[1]
GPI[2]
GPI[3]
LOCK
PASS
ID[X]
1.8V
10 k:
RID
The "Optional" components shown are
provisions to provide higher system noise
immunity and will therefore result in higher
performance.
Figure 36. DS92LX2122 Typical Connection Diagram
GPI
Control
Interface
32
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Copyright © 2010â2013, Texas Instruments Incorporated
Product Folder Links: DS92LX2121 DS92LX2122
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