DS92LX2121 Datasheet, PDF (10/42 Pages) National Semiconductor (TI) – 10 - 50 MHz Channel Link III Serializer and Deserializer with Embedded Bi-Directional Control Channel

DS92LX2121, DS92LX2122
SNLS330I – MAY 2010 – REVISED APRIL 2013
www.ti.com
Serializer Electrical Characteristics Serializer Switching Characteristics^(1)(2)(3)
Symbol
Parameter
Conditions
Min
Typ
t_LHT
CML Low-to-High Transition R_L = 100Ω (Figure 7)
Time
150
t_HLT
CML High-to-Low Transition R_L = 100Ω
Time
(Figure 7)
150
t_DIS
Data Input Setup to PCLK
2.0
Serializer Data Inputs (Figure 13)
t_DIH
Data Input Hold from PCLK
2.0
t_PLD
Serializer PLL Lock Time
R_L = 100Ω
1
t_SD
Serializer Delay
RT = 100Ω
f = 10-50 MHz
Reg Address 0x03h b[0] (TRFB = 1)
(Figure 15)
6.386T + 5
6.386T +
12
t_JIND
Serializer Output
Serializer output intrinsic deterministic
Deterministic Jitter
jitter . Measured (cycle-cycle) with
0.13
PRBS-7 test pattern PCLK = 50 MHz
t_JINR
Serializer Output Random Serializer output intrinsic random jitter
0.04
Jitter
(cycle-cycle). Alternating-1,0 pattern.
PCLK = 50 MHz
Serializer output peak-to-peak jitter
includes deterministic jitter, random
t_JINT
Peak-to-peak Serializer
Output Jitter
jitter, and jitter transfer from serializer
input. Measured (cycle-cycle) with
PRBS-7 test pattern.
PCLK = 50MHz
0.396
λ_STXBW
Serializer Jitter Transfer
Function -3 dB Bandwidth
PCLK = 50 MHz Default Registers
1.90
δ_STX
Serializer Jitter Transfer
Function (Peaking
PCLK = 50 MHz Default Registers
0.944
Serializer Jitter Transfer
PCLK = 50 MHz Default Registers
δ_STXf
Function (Peaking
500
Frequency)
Max
330
330
2
6.386T +
19.7
Units
ps
ps
ns
ns
ms
ns
UI
UI
UI
MHz
dB
kHz
(1) The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not guaranteed.
(2) Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground
except VOD, ΔVOD, VTH and VTL which are differential voltages.
(3) Typical values represent most likely parametric norms at 1.8V or 3.3V, T_A = +25°C, and at the Recommended Operation Conditions at
the time of product characterization and are not guaranteed.
Serializer Electrical Characteristics Deserializer Switching Characteristics^(1)(2)(3)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
t_RCP
Receiver Output Clock Period
t_RCP = t_TCP
PCLK
20
T
t_PDC
PCLK Duty Cycle
PCLK
45
50
t_CLH
t_CHL
LVCMOS Low-to-High Transition
Time
LVCMOS High-to-Low Transition
Time
V_DDIO: 1.71 V to 1.89 V
or 3.0 V to 3.6 V,
CL = 8pF (lumped load)
Default Registers
(Figure 16 ) ⁽⁴⁾
Deserializer PCLK
Output
1.3
1.3
2.0
2.0
Max Units
100
ns
55
%
2.8
2.8
ns
(1) The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not guaranteed.
(2) Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground
except VOD, ΔVOD, VTH and VTL which are differential voltages.
(3) Typical values represent most likely parametric norms at 1.8V or 3.3V, T_A = +25°C, and at the Recommended Operation Conditions at
the time of product characterization and are not guaranteed.
(4) Specification is guaranteed by design and is not tested in production.
10
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