AMC7836_15 Datasheet, PDF (66/87 Pages) Texas Instruments – AMC7836 High-Density, 12-Bit Analog Monitor and Control Solution With Multichannel ADC, Bipolar DACs, Temperature Sensor, and GPIO Ports

AMC7836
SLAS986B – NOVEMBER 2014 – REVISED FEBRUARY 2015
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7.6.12 Alarm Hysteresis Configuration: Address 0xA0 and 0xA5
The hysteresis registers define the hysteresis in the out-of-range alarms.
7.6.12.1 ADCn-Hysteresis Register (address = 0xA0 through 0xA4) [reset = 0x08]
Figure 106. ADCn-Hysteresis Register (R/W)
7
6
Reserved
R/W-0
Bit Field
7
Reserved
6-0 HYSTn(6:0)
5
4
3
2
1
0
HYSTn(6:0)
R/W-0x08
Table 55. ADCn-Hysteresis Register Field Descriptions
Type
R/W
R/W
Reset
0
0x08
Description
Reserved for factory use.
Hysteresis of general purpose ADC_n, 1 LSB per step
7.6.12.2 LT-Hysteresis Register (address = 0xA5) [reset = 0x08]
Figure 107. LT-Hysteresis Register (R/W)
7
6
5
4
3
2
1
0
Reserved
HYST-LT(4:0)
R/W-All zeros
R/W-0x08
Bit Field
7-5 Reserved
4-0 HYST-LT(4:0)
Table 56. LT-Hysteresis Register Field Descriptions
Type
R/W
R/W
Reset
All zeros
0x08
Description
Reserved for factory use.
Hysteresis of local temperature sensor, 1°C per step. The range
is 0°C to 31°C.
7.6.13 Clear and Power-Down Registers: Address 0xB0 through 0XB4
7.6.13.1 DAC Clear 0 Register (address = 0xB0) [reset = 0x00]
7
CLR-B7
R/W-0
6
CLR-B6
R/W-0
Figure 108. DAC Clear 0 Register (R/W)
5
CLR-B5
R/W-0
4
CLR-B4
R/W-0
3
CLR-A3
R/W-0
2
CLR-A2
R/W-0
1
CLR-A1
R/W-0
0
CLR-A0
R/W-0
Bit Field
7
CLR-B7
6
CLR-B6
5
CLR-B5
4
CLR-B4
3
CLR-A3
2
CLR-A2
1
CLR-A1
0
CLR-A0
Table 57. DAC Clear 0 Register Field Descriptions
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Description
This register uses software to force the DAC into a clear state.
If CLRn = 1, DAC_n is forced into a clear state.
If CLRn = 0, DAC_n is restored to normal operation.
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