LPV521_15 Datasheet, PDF (6/33 Pages) Texas Instruments – LPV521 NanoPower, 1.8-V, RRIO, CMOS Input, Operational Amplifier

LPV521
SNOSB14D – AUGUST 2009 – REVISED DECEMBER 2014
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6.7 3.3-V DC Electrical Characteristics
Unless otherwise specified, all limits for T_A = 25°C, V⁺ = 3.3 V, V^− = 0 V, V_CM = V_O = V⁺/2, and R_L > 1 MΩ.⁽¹⁾
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
V_OS
Input Offset Voltage
V_CM = 0.3 V
Temperature extremes
–1
–1.23
0.1
1
1.23
TCV_OS
Input Offset Voltage Drift⁽²⁾
V_CM = 3 V
Temperature extremes
Temperature extremes
–1
0.1
1
–1.23
1.23
±0.4
–3
3
I_BIAS
Input Bias Current
Temperature extremes
–1
0.01
1
–50
50
I_OS
CMRR
Input Offset Current
Common Mode Rejection Ratio
0 V ≤ V_CM ≤ 3.3 V
Temperature extremes
20
72
97
70
0 V ≤ V_CM ≤ 2.2 V
Temperature extremes
78
106
75
PSRR
Power Supply Rejection Ratio
2.7 V ≤ V_CM ≤ 3.3 V
Temperature extremes
1.6 V ≤ V⁺ ≤ 5.5 V
V_CM = 0.3 V
Temperature extremes
77
121
76
85
109
76
CMVR
Common Mode Voltage Range
CMRR ≥ 72 dB
CMRR ≥ 70 dB
−0.1
3.4
Temperature extremes
0
3.3
A_VOL
V_O
Large Signal Voltage Gain
Output Swing High
Output Swing Low
I_O
Output Current⁽³⁾
V_O = 0.5 V to 2.8 V
R_L = 100 kΩ to V⁺/2
Temperature extremes
R_L = 100 kΩ to V⁺/2
V_IN(diff) = 100 mV
Temperature extremes
R_L = 100 kΩ to V⁺/2
V_IN(diff) = −100 mV
Temperature extremes
Sourcing, V_O to V^–
V_IN(diff) = 100 mV
Temperature extremes
Sinking, V_O to V⁺
V_IN(diff) = −100 mV
Temperature extremes
82
120
76
3
50
50
2
50
50
5
11
4
5
12
4
I_S
Supply Current
V_CM = 0.3 V
Temperature extremes
346
400
600
V_CM = 3 V
Temperature extremes
471
600
860
UNIT
mV
μV/°C
pA
fA
dB
dB
V
dB
mV
from either
rail
mA
nA
(1) Electrical Characteristics values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in
very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables
under conditions of internal self-heating where TJ TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the
device may be permanently degraded, either mechanically or electrically.
(2) The offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change.
(3) The short circuit test is a momentary open-loop test.
6
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