LPV521_15 Datasheet, PDF (3/33 Pages) Texas Instruments – LPV521 NanoPower, 1.8-V, RRIO, CMOS Input, Operational Amplifier

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5 Pin Configuration and Functions
LPV521
SNOSB14D – AUGUST 2009 – REVISED DECEMBER 2014
SC70-5 Top View
1
OUT
5 _V+
V^{- 2}
+-
3
IN+
4
IN-
PIN
NO.
NAME
1
OUT
2
V-
3
IN+
4
IN-
5
V+
TYPE
O
P
I
I
P
Pin Functions
Output
Negative Power Supply
Noninverting Input
Inverting Input
Positive Power Supply
DESCRIPTION
6 Specifications
6.1 Absolute Maximum Ratings⁽¹⁾
Any pin relative to V^-
IN+, IN-, OUT Pins
V⁺, V^-, OUT Pins
Differential Input Voltage (V_IN+ - V_IN-)
Junction Temperature⁽²⁾
Mounting Temperature
Infrared or Convection (30 sec.)
Wave Soldering Lead Temp. (4 sec.)
Storage temperature, T_stg
MIN
−0.3
V^– – 0.3 V
–300
–40
−65
MAX
6
V⁺ + 0.3 V
40
300
150
260
260
150
UNIT
V
V
mA
mV
°C
°C
°C
°C
(1) Absolute Maximum Ratings indicate limits beyond which damage may occur. Recommended Operating Conditions indicate conditions
for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and test
conditions, see the Electrical Characteristics.
(2) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature
is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.
6.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-
C101 ⁽²⁾
Machine Model
VALUE
±2000
±1000
±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
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