DAC3484_15 Datasheet, PDF (57/107 Pages) Texas Instruments – DAC3484 Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter (DAC)

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DAC3484
SLAS749D – MARCH 2011 – REVISED SEPTEMBER 2015
NOTE
With internal reference, the minimum Rbias resistor value is 1.28 kΩ. Resistor value below
1.28 kΩ is not recommended since it will program the full-scale current to go above 30mA
and potentially damages the device.
7.3.18 DAC Transfer Function
The CMOS DACs consist of a segmented array of PMOS current sources, capable of sourcing a full-scale output
current up to 30 mA. Differential current switches direct the current to either one of the complementary output
nodes IOUTP or IOUTN. Complementary output currents enable differential operation, thus canceling out
common mode noise sources (digital feed-through, on-chip and PCB noise), dc offsets, even order distortion
components, and increasing signal output power by a factor of two.
The full-scale output current is set using external resistor R_BIAS in combination with an on-chip bandgap voltage
reference source (+1.2 V) and control amplifier. Current I_BIAS through resistor R_BIAS is mirrored internally to
provide a maximum full-scale output current equal to 64 times I_BIAS.
The relation between IOUTP and IOUTN can be expressed as:
IOUT_FS = IOUTP + IOUTN
We will denote current flowing into a node as – current and current flowing out of a node as + current. Since the
output stage is a current source the current flows from the IOUTP and IOUTN pins. The output current flow in
each pin driving a resistive load can be expressed as:
IOUTP = IOUT_FS x CODE / 65536
IOUTN = IOUT_FS x (65535 – CODE) / 65536
where CODE is the decimal representation of the DAC data input word
For the case where IOUTP and IOUTN drive resistor loads R_L directly, this translates into single ended voltages
at IOUTP and IOUTN:
VOUTP = IOUT1 x R_L
VOUTN = IOUT2 x R_L
Assuming that the data is full scale (65535 in offset binary notation) and the R_L is 25 Ω, the differential voltage
between pins IOUTP and IOUTN can be expressed as:
VOUTP = 20mA x 25 Ω = 0.5 V
VOUTN = 0mA x 25 Ω = 0 V
VDIFF = VOUTP – VOUTN = 0.5V
Note that care should be taken not to exceed the compliance voltages at node IOUTP and IOUTN, which would
lead to increased signal distortion.
7.3.19 Analog Current Outputs
The DAC3484 can be easily configured to drive a doubly terminated 50-Ω cable using a properly selected RF
transformer. Figure 85 and Figure 86 show the 50-Ω doubly terminated transformer configuration with 1:1 and 4:1
impedance ratio, respectively. Note that the center tap of the primary input of the transformer has to be grounded
to enable a DC current flow. Applying a 20-mA full-scale output current would lead to a 0.5 Vpp for a 1:1
transformer and a 1 Vpp output for a 4:1 transformer. The low dc-impedance between IOUTP or IOUTN and the
transformer center tap sets the center of the ac-signal to GND, so the 1 Vpp output for the 4:1 transformer
results in an output between –0.5 V and 0.5 V.
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