OMAP3530_08 Datasheet, PDF (56/264 Pages) Texas Instruments – Applications Processor

OMAP3530/25 Applications Processor
SPRS507B – FEBRUARY 2008 – REVISED JULY 2008
Table 2-3. Ball Characteristics (CUS Pkg.) (continued)
BALL
BOTTOM [1]
PIN
NAME [3]
W2
F1
F2
G3
K5
L1
E1
C1
C2
G22
E22
F22
J21
AC19
AB19
AD20
AC20
AD21
AC21
gpmc_clk
gpio_59
safe_mode
gpmc_nadv_ale
gpmc_noe
gpmc_nwe
gpmc_nbe0_cle
gpio_60
safe_mode
gpmc_nbe1
gpio_61
safe_mode
gpmc_nwp
gpio_62
safe_mode
gpmc_wait0
gpmc_wait3
sys_ ndmareq1
gpio_65
safe_mode
dss_pclk
gpio_66
safe_mode
dss_hsync
gpio_67
safe_mode
dss_vsync
gpio_68
safe_mode
dss_acbias
gpio_69
safe_mode
dss_data0
uart1_cts
gpio_70
safe_mode
dss_data1
uart1_rts
gpio_71
safe_mode
dss_data2
gpio_72
safe_mode
dss_data3
gpio_73
safe_mode
dss_data4
uart3_rx_ irrx
gpio_74
safe_mode
dss_data5
uart3_tx_ irtx
gpio_75
safe_mode
MODE [4]
TYPE [5]
BALL
RESET
STATE [6]
BALL
RESET
REL.
STATE [7]
0
O
L
0
4
IO
7
0
O
0
0
0
O
1
1
0
O
1
1
0
O
L
0
4
IO
7
0
O
L
L
4
IO
7
0
O
L
0
4
IO
7
0
I
H
H
0
I
H
H
1
I
4
IO
7
0
O
H
H
4
IO
7
0
O
H
H
4
IO
7
0
O
H
H
4
IO
7
0
O
L
L
4
IO
7
0
IO
L
L
2
I
4
IO
7
0
IO
L
L
2
O
4
IO
7
0
IO
L
L
4
IO
7
0
IO
L
L
4
IO
7
0
IO
L
L
2
I
4
IO
7
0
IO
L
L
2
O
4
IO
7
RESET
REL.
MODE [8]
0
0
0
0
0
7
0
0
7
7
7
7
7
7
7
7
7
7
7
POWER [9]
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
HYS
[10]
Yes
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
BUFFER
STRENGTH
(mA) [11]
4
4
4
4
4
4
4
NA
4
4
4
4
8
4
4
4
4
4
4
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PULL
U/D
TYPE [12]
PU/ PD
IO
CELL [13]
LVCMOS
NA
NA
NA
PU/ PD
LVCMOS
LVCMOS
LVCMOS
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
PU/ PD
LVCMOS
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD
LVCMOS
PU/ PD LVDS/ CMOS
PU/ PD LVDS/ CMOS
PU/ PD LVDS/ CMOS
PU/ PD LVDS/ CMOS
PU/ PD LVDS/ CMOS
PU/ PD LVDS/ CMOS
56
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