LMH6523_15 Datasheet, PDF (5/33 Pages) Texas Instruments – High Performance Quad DVGA

LMH6523
www.ti.com
SNOSC88 – DECEMBER 2012
ELECTRICAL CHARACTERISTICS - 5V (continued)
The following specifications apply for single supply with V+ = 5V, Maximum Gain (0 Attenuation), R_L = 200Ω, V_OUT = 4V_PPD,
fin = 200 MHz, High Power Mode, Boldface limits apply at temperature extremes.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
ENABLE PINS
V_IL
Logic Input Low Voltage
V_IM
Logic Input Mid Level
V_IH
Logic Input High Level
V_SB
Enable Pin Self Bias Voltage
I_IL
Input Bias Current, Logic Low
I_IM
Input Bias Current, Logic Mid
I_IH
Input Bias Current, Logic High
PARALLEL MODE TIMING
Amplifier disabled
Amplifier Low Power Mode
Amplifier High Power Mode
No external load
Digital input voltage = 0.2V
Digital input voltage = 1.5V
Digital input voltage = 3.0V
0
0.6
2.2
1.37
–200
28
500
0.4
V
1.9
V
5
V
V
µA
µA
µA
t_GS
Setup Time
t_GH
Hold Time
SERIAL MODE
3
ns
3
ns
f_CLK
SPI Clock Frequency
LOW POWER MODE
50% duty cycle, ATE tested at 20MHz
20
50
MHz
(Enable pins are self biased)
ICC
Total Supply Current
all four channels in low power mode
370
398 mA
I_BIAS
I_CC
OIP3
Output Pin Bias Current
Disabled Supply Current
Output Intermodulation Intercept
Point
External Inductor, No Load, V_OUT<200mV
Enable Pin < 0.4V
f = 200 MHz, V_OUT = 4 dBm per tone
26
mA
74
mA
44
dBm
P1dB 1dB Compression Point
16
dBm
HD2
HD3
Second Order Harmonic Distortion
Third Order Harmonic Distortion
f = 100 MHz, V_OUT =2 VPPD
f = 200 MHz, V_OUT = 2 VPPD
f = 100 MHz, V_OUT = 2 VPPD
f = 200 MHz, V_OUT = 2 VPPD
−90
dBc
−79
dBc
−91
dBc
−79
dBc
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