LMH6523_15 Datasheet, PDF (25/33 Pages) Texas Instruments – High Performance Quad DVGA

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R1
AMP V_OUT -
L1
C1
L5
LMH6523
SNOSC88 – DECEMBER 2012
ADC V_IN +
C2
L2
AMP V_OUT + _R2
Figure 56. Sample Filter
ADC V_IN -
ADC V_CM
SVA-30206513
POWER SUPPLIES
The LMH6523 was designed primarily to be operated on 5V power supplies. The voltage range for V+ is 4.75V to
5.25V. Power supply accuracy of 2.5% or better is advised. When operated on a board with high speed digital
signals it is important to provide isolation between digital signal noise and the LMH6523 inputs. The
SP16160CH1RB reference board provides an example of good board layout.
DYNAMIC POWER MANAGEMENT, USING LOW POWER MODE
The LMH6523 offers the option of a reduced power mode of operation referred to as Low Power Mode. In this
mode of operation power consumption is reduced by approximately 20%. In many applications the linearity of the
LMH6523 is fully adequate for most signal conditions. This would apply for a radio in a noise limited environment
with no close-in blocker signals. During these conditions the LMH6523 can be operated in the low power mode.
When a blocking signal is detected, or when system dynamic range needs to be increased, the LMH6523 can be
rapidly switched from the Low Power Mode to the standard, High Power Mode.
The output response shown in Figure 57 is for a 2 MHz switching frequency pulse applied to the enable pin with
a 50 MHz input signal. Analysis with a spectrum analyzer showed that the power mode switching spurs created
by the switching signal were −80dBc with respect to the 50 MHz tone signal. This shows that rapid switching of
power modes has virtually no impact on the signal quality.
2
5
Enable
1
VOUT
4
0
3
-1
2
-2 ^{High Power Mode Low Power Mode} 1
-3
0
0.0 0.1 0.2 0.3 0.4 0.5
TIME ( s)
SVA-30206567
Figure 57. Signal Output During Mode Change from High Power Mode to Low Power Mode
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMH6523
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