LMH6523_15 Datasheet, PDF (4/33 Pages) Texas Instruments – High Performance Quad DVGA

LMH6523
SNOSC88 – DECEMBER 2012
www.ti.com
ELECTRICAL CHARACTERISTICS - 5V (continued)
The following specifications apply for single supply with V+ = 5V, Maximum Gain (0 Attenuation), R_L = 200Ω, V_OUT = 4V_PPD,
fin = 200 MHz, High Power Mode, Boldface limits apply at temperature extremes.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
IMD3
P1dB
Third Order Intermodulation
Products
1dB Compression Point
f = 100 MHz, V_OUT = 4 dBm per tone
f = 200 MHz, V_OUT = 4 dBm per tone
–98
dBc
–90
17
dBm
HD2
HD3
CMRR
Second Order Harmonic Distortion
Third Order Harmonic Distortion
Common Mode Rejection
f = 100 MHz, V_OUT =2 V_PPD
f = 200 MHz, V_OUT =2 V_PPD
f = 100 MHz, V_OUT =2 V_PPD
f = 200 MHz, V_OUT =2 V_PPD
Pin = −15 dBm
–88
dBc
–78
–99
dBc
–75
–35
dBc
ANALOG I/O
R_IN
V_ICM
Input Resistance
Input Common Mode Voltage
Maximum Input Voltage Swing
Maximum DIfferential Output
Voltage Swing
Differential, Measured at DC
Self Biased
Volts peak to peak, differential
Differential, f < 10 MHz
97
Ω
2.5
V
5.5
V_PPD
10
V_PPD
R_OUT
Output Resistance
X_TLK
Channel to Channel Crosstalk
GAIN PARAMETERS
Differential, Measured at DC
Maximum Gain, f = 200 MHz
20
Ω
–65
dBc
Maximum Voltage Gain
Attenuation code 00000
25.74
dB
Minimum Gain
Attenuation code 11111
–4.3
dB
Gain Steps
32
Gain Step Size
1
dB
Channel Matching
Gain error between channels
±0.15
dB
Gain Step Error
Any two adjacent steps over entire range
Any two adjacent steps, 0 dB attenuation to
23 dB attenuation
±0.5
dB
±0.1
Gain Step Phase Shift
Any two adjacent steps over entire range
Any two adjacent steps, 0dB attenuation to
23 dB attenuation
±3
Degrees
±2
Gain Step Switching Time
20
ns
Enable/ Disable Time
Settled to 90% level
200
ns
POWER REQUIREMENTS
ICC
Supply Current
465
485 mA
P
Power
2.3
2.43
W
I_BIAS
ICC
Output Pin Bias Current
Disabled Supply Current
External inductor, no load, V_OUT< 200 mV
36
mA
74
mA
ALL DIGITAL INPUTS EXCEPT ENABLES
Logic Compatibility
TTL, 2.5V CMOS, 3.3V CMOS, 5V CMOS
V_IL
Logic Input Low Voltage
V_IH
Logic Input High Voltage
I_IH
Logic Input High Input Current
Digital Input Voltage = 2.0 V
I_IL
Logic Input Low Input Current
Digital Input Voltage = 0.4 V
0
2
–9
–47
0.4
V
5
V
µA
µA
4
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