BQ24751RHDRG4 Datasheet, PDF (5/38 Pages) Texas Instruments – Host-controlled Multi-chemistry Battery Charger

bq24751
www.ti.com............................................................................................................................................... SLUS734D – DECEMBER 2006 – REVISED MARCH 2009
Table 1. PIN FUNCTIONS – 28-PIN QFN (continued)
PIN
NAME
SRN
SRP
CELLS
LEARN
PGND
LODRV
REGN
PH
HIDRV
BTST
PVCC
PowerPad
DESCRIPTION
NO.
Charge current sense resistor, negative input. A 0.1-µF ceramic capacitor is placed from SRN to CSP to provide
18 differential-mode filtering. An optional 0.1-µF ceramic capacitor is placed from SRN pin to AGND for common-mode
filtering.
19
Charge current sense resistor, positive input. A 0.1-µF ceramic capacitor is placed from SRN to SRP to provide
differential-mode filtering. A 0.1-µF ceramic capacitor is placed from SRP pin to AGND for common-mode filtering.
20 2, 3 or 4 cells selection logic input. Logic low programs 3 cell. Logic high programs 4 cell. Floating programs 2 cell.
Learn mode logic input control pin — logic high to override system selector when adapter is present, the battery is
discharged to recalibrate the battery-pack gas gauge. When adapter is present and LEARN is high, battery charging is
disabled, the adapter is disconnected (ACDRV is off), and the battery is connected to system (BATDRV is on). Sytem
21 selector automatically switches to adapter if battery is discharged below LOWBAT (3 V). When adapter is present and
LEARN is low, the adapter is connected to system in normal selector logic (ACDRV is on and BATDRV is off), allowing
battery charging. If adapter is not present, the battery is always connected to the system (ACDRV is off and BATDRV
is on).
Power ground. Ground connection for high-current power converter node. On PCB layout, connect directly to source of
22 low-side power MOSFET, to ground connection of in put and output capacitors of the charger. Only connect to AGND
through the PowerPad underneath the IC.
23 PWM low side driver output. Connect to the gate of the low-side power MOSFET with a short trace.
24
PWM low side driver positive 6-V supply output. Connect a 1-µF ceramic capacitor from REGN to PGND, close to the
IC. Use for high-side driver bootstrap voltage by connecting a small-signal Schottky diode from REGN to BTST.
PWM high side driver negative supply. Connect to the phase switching node (junction of the low-side power MOSFET
25 drain, high-side power MOSFET source, and output inductor). Connect the 0.1-µF bootstrap capacitor from from PH to
BTST.
26 PWM high side driver output. Connect to the gate of the high-side power MOSFET with a short trace.
27
PWM high side driver positive supply. Connect a 0.1-µF bootstrap ceramic capacitor from BTST to PH. Connect a
small bootstrap Schottky diode from REGN to BTST.
IC power positive supply. Connect to the common-source (diode-OR) point: source of high-side P-channel MOSFET
28 and source of reverse-blocking power P-channel MOSFET. Place a 1-µF ceramic capacitor from PVCC to PGND pin
close to the IC.
Exposed pad beneath the IC. AGND and PGND star-connected only at the PowerPad plane. Always solder PowerPad
to the board, and have vias on the PowerPad plane connecting to AGND and PGND planes. It also serves as a
thermal pad to dissipate the heat.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)^{(1) (2)}
Voltage range
Maximum difference voltage
Junction temperature range
Storage temperature range
PVCC, ACP, ACN, SRP, SRN, BAT, BATDRV, ACDRV
PH
REGN, LODRV, VREF, VDAC, VADJ, ACSET, SRSET, ACDET, ACOP,
CHGEN, CELLS, STAT, ACGOOD, LEARN, OVPSET
VREF, IADAPT
BTST, HIDRV with respect to AGND and PGND
ACP–ACN, SRP–SRN, AGND–PGND
VALUE
–0.3 to 30
–1 to 30
–0.3 to 7
–0.3 to 3.6
–0.3 to 36
–0.5 to 0.5
–40 to 155
–55 to 155
UNIT
V
°C
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND if not specified. Currents are positive into, negative out of the specified terminal. Consult Packaging
Section of the data book for thermal limitations and considerations of packages.
Copyright © 2006–2009, Texas Instruments Incorporated
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