BQ24751RHDRG4 Datasheet, PDF (22/38 Pages) Texas Instruments – Host-controlled Multi-chemistry Battery Charger

bq24751
SLUS734D – DECEMBER 2006 – REVISED MARCH 2009............................................................................................................................................... www.ti.com
the N-channel upper device always has enough voltage to stay fully on. If the BTST-to-PH voltage falls below 4 V
for more than 3 cycles, the high-side N-channel power MOSFET is turned off and the low-side N-channel power
MOSFET is turned on to pull the PH node down and recharge the BTST capacitor. Then the high-side driver
returns to 100% duty-cycle operation until the (BTST-PH) voltage is detected falling low again due to leakage
current discharging the BTST capacitor below 4 V, and the reset pulse is reissued.
The 300-kHz fixed-frequency oscillator tightly controls the switching frequency under all conditions of input
voltage, battery voltage, charge current, and temperature. This simplifies output-filter design, and keeps it out of
the audible noise region. The charge-current sense resistor R_SR should be designed with at least half or more of
the total output capacitance placed before the sense resistor, contacting both sense resistor and the output
inductor; and the other half, or remaining capacitance placed after the sense resistor. The output capacitance
should be divided and placed on both sides of the charge-current sense resistor. A ratio of 50:50 percent gives
the best performance; but the node in which the output inductor and sense resistor connect should have a
minimum of 50% of the total capacitance. This capacitance provides sufficient filtering to remove the switching
noise and give better current-sense accuracy. The Type-III compensation provides phase boost near the
cross-over frequency, giving sufficient phase margin.
Synchronous and Non-Synchronous Operation
The charger operates in non-synchronous mode when the sensed charge current is below the ISYNSET value.
Otherwise, the charger operates in synchronous mode.
During synchronous mode, the low-side N-channel power MOSFET is on when the high-side N-channel power
MOSFET is off. The internal gate-drive logic uses break-before-make switching to prevent shoot-through
currents. During the 30-ns dead time where both FETs are off, the back-diode of the low-side power MOSFET
conducts the inductor current. Having the low-side FET turn-on keeps the power dissipation low, and allows safe
charging at high currents. During synchronous mode, the inductor current always flows, and the device operates
in Continuous Conduction Mode (CCM), creating a fixed two-pole system.
During non-synchronous operation, after the high-side n-channel power MOSFET turns off, and after the
break-before-make dead-time, the low-side n-channel power MOSFET turns on for approximately 80 ns, then the
low-side power MOSFET turns off and stays off until the beginning of the next cycle, when the high-side power
MOSFET is turned on again. The 80-ns low-side MOSFET on-time is required to ensure that the bootstrap
capacitor is always recharged and able to keep the high-side power MOSFET on during the next cycle. This is
important for battery chargers, where unlike regular dc-dc converters, there is a battery load that maintains a
voltage and can both source and sink current. The 80-ns low-side pulse pulls the PH node (connection between
high and low-side MOSFET) down, allowing the bootstrap capacitor to recharge up to the REGN LDO value.
After the 80 ns, the low-side MOSFET is kept off to prevent negative inductor current from flowing. The inductor
current is blocked by the turned-off low-side MOSFET, and the inductor current becomes discontinuous. This
mode is called Discontinuous Conduction Mode (DCM).
During the DCM mode, the loop response automatically changes and has a single-pole system at which the pole
is proportional to the load current, because the converter does not sink current, and only the load provides a
current sink. This means that at very low currents, the loop response is slower, because there is less sinking
current available to discharge the output voltage. At very low currents during non-synchronous operation, there
may be a small amount of negative inductor current during the 80-ns recharge pulse. The charge should be low
enough to be absorbed by the input capacitance.
Whenever BTST – PH < 4 V, the 80-ns recharge pulse occurs on LODRV, the high-side MOSFET does not turn
on, and the low-side MOSFET does not turn on (only 80-ns recharge pulse).
In the bq24751, V_ISYNSET=I_SYN×R_SR is internally set to 13mV as the charge-current threshold at which the charger
changes from non-synchronous operation to synchronous operation. The low-side driver turns on for only 80 ns
to charge the boost capacitor. This is important to prevent negative inductor current, which may cause a boost
effect in which the input voltage increases as power is transferred from the battery to the input capacitors. This
boost effect can lead to an over-voltage on the PVCC node and potentially damage the system. The inductor
ripple current is given by
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