BQ24070 Datasheet, PDF (5/26 Pages) Texas Instruments – SINGLE-CHIP CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC

bq24070
www.ti.com
SLUS694A – MARCH 2006 – REVISED MARCH 2006
ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range (0°C ≤ T_J ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
V_(SET)
Battery charge current set
voltage ⁽⁵⁾
K_(SET)
Charge current set factor, BAT
USB MODE INPUT CURRENT LIMIT
Voltage on ISET1, V_VCC≥ 4.35 V,
V_I(OUT)- V_I(BAT) > V_(DO-MAX),
V_I(BAT) > V_(LOWV)
100 mA ≤ I_O(BAT) ≤ 1.5 A
10 mA ≤ I_O(BAT) ≤ 100 mA⁽⁶⁾
2.47
2.50
2.53
V
375
425
450
300
450
600
I_(USB)
USB input port current range
ISET2 = Low
ISET2 = High
80
90
100
mA
400
500
BAT PIN CHARGING VOLTAGE REGULATION, V_{O (BAT-REG)} + V _(DO-MAX) < V_CC, I_TERM < I_BAT(OUT) ≤ 1 A
Battery charge voltage
4.2
V
V_O(BAT-REG)
Battery charge voltage regulation ^TA ^{= 25°C}
accuracy
–0.5%
–1%
0.5%
1%
CHARGE TERMINATION DETECTION
I_(TERM)
V_(TERM)
T_DGL(TERM)
Charge termination detection
range
Charge termination set voltage,
measured on ISET1
Deglitch time for termination
detection
V_I(BAT) > V_(RCH),
I_(TERM) = (K_(SET) × V_(TERM))/ R_SET
V_I(BAT) > V_(RCH) , Mode = High
V_I(BAT) > V_(RCH) , Mode = Low
t_FALL = 100 ns, 10 mV overdrive,
I_CHG increasing above or decreasing
below threshold
10
150 mA
230
250
270
mV
95
100
130
22.5
ms
TEMPERATURE SENSE COMPARATORS
V_LTF
V_HTF
I_TS
T_DGL(TF)
High voltage threshold
Temp fault at V(TS) > V_LTF
Low voltage threshold
Temp fault at V(TS) < V_HTF
Temperature sense current source
Deglitch time for temperature fault
detection ⁽⁷⁾
R_(TMR) = 50 kΩ, V_I(BAT) increasing or
decreasing above and below;
100-ns fall time, 10-mv overdrive
2.465
0.485
94
2.500
0.500
100
22.5
2.535
V
0.515
V
106
µA
ms
BATTERY RECHARGE THRESHOLD
V_RCH
Recharge threshold voltage
V_O(BAT-REG)
–0.075
V_O(BAT-REG)
–0.100
V_O(BAT-REG)
–0.125
V
T_DGL(RCH)
Deglitch time for recharge
detection ⁽⁷⁾
R_(TMR) = 50 kΩ, V_I(BAT) increasing
or decreasing below threshold,
100-ns fall time, 10-mv overdrive
22.5
ms
STAT1, STAT2, AND PG, OPEN DRAIN (OD) OUTPUTS⁽⁸⁾
V_OL
Low-level output saturation voltage
I_OL = 5 mA, An external pullup
resistor ≥ 1 K required.
0.25
V
I_LKG
Input leakage current
ISET2, CE INPUTS
1
5
µA
V_IL
V_IH
I_IL
I_IH
I_IL
I_IH
t_(CE-HLDOFF)
MODE INPUT
Low-level input voltage
High-level input voltage
Low-level input current, CE
High-level input current, CE
Low-level input current, ISET2
High-level input current, ISET2
Holdoff time, CE
V_ISET2 = 0.4 V
V_ISET2 = V_CC
CE going low only
0
0.4
V
1.4
–1
1
µA
–20
40
4
6
ms
V_IL
Low-level input voltage
Falling Hi→Low; 280 K ± 10% applied
when low.
0.975
1
1.025
V
V_IH
High-level input voltage
Input R_Mode sets external hysteresis
V_IL + .01
I_IL
Low-level input current, Mode
–1
V_IL + .024
V
µA
(5) For half-charge rate, V_(SET) is 1.25 V ± 25 mV.
(6) Specification is for monitoring charge current via the ISET1 pin during voltage regulation mode, not for a reduced fast-charge level.
(7) All deglitch periods are a function of the timer setting and is modified in DPPM or thermal regulation modes by the percentages that the
program current is reduced.
(8) See Charger Sleep mode for PG (V_CC = V_IN) specifications.
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