AFE8406 Datasheet, PDF (47/138 Pages) Texas Instruments – 14-Bit, 85 MSPS Dual ADC, 8-Channel Wideband Receiver

2.2.10 DDC AGC
I, Q 18
12 integer &
12 fractional
24
Freeze
(from register bit
Freeze
(from sync source)
Gain 24
PRODUCT PREVIEW
AFE8406
SLWS168 - OCTOBER 2005
limit &
round
18
I, Q outputs (up to 25-bits in AGC bypass mode)
threshold zero mask ucnt
8
4
8
ocnt
4
dblw dabv dzro dsat
44 44
8
magnitude
compare
2
under/over
detect
2
shift select
clear
amax amin
16
16
29
29
shift
accumulate
24
limit
S=+/-1, D=4-bit shift ⁵
min limit
max limit
gain adjust
The AFE8406 automatic gain control circuit is shown above. The basic operation of the circuit is to multiply
the 18 bit input data from the PFIR by a 24-bit gain word that represents a gain or attenuation in the range
of 0 to 4096. The gain format is mixed integer and fraction. The 12-bit integer allows the gain to be boosted
by up to factor of 4096 (72 dB). The 12-bit fractional part allows the gain to be adjusted up or down in
steps of one part in 4096, or approximately 0.002 dB. If the integer portion is zero, then the circuit
attenuates the signal. The gain adjusted output data is saturated to full scale and then rounded to between
4 and 18 bits in steps of one bit.
The AGC portion of the circuit is used to automatically adjust the gain so that the “median” magnitude of
the output data matches a target value, which is performed by comparing the magnitude of the output data
with a target threshold. If the magnitude is greater than the threshold, then the gain is decreased,
otherwise it is increased. The gain is adjusted as: G(t) = G + A(t), where G is the default, user supplied
gain value, and A(t) is the time varying adjustment. A(t) is updated as A(t) = A(t) + G(t)*S*2^-D , where S=1
if the magnitude is less than the threshold and is -1 if the magnitude exceeds the threshold, and where D
sets the adjustment step size. Note that the adjustment is a fraction of the current gain. This is designed to
set the AGC noise level to a known and acceptable level while keeping the AGC convergence and tracking
rate constant, independent of the gain level. The AGC noise will be equal to +- 2^-D and the AGC attack and
decay rate will be exponential, with a time constant equal to 2^-D. Hence, the AGC will increase or decrease
by 0.63 times G(t) in 2^D updates.
If one assumes the data is random with a Gaussian distribution, which is valid for UMTS if more than 12
users with different codes have been overlaid, then the relationship between the RMS level and the
median is MEDIAN = 0.6745*RMS, hence the threshold should be set to 0.6745 times the desired RMS
level.
The gain step size can be set using four different values of “D”, each of which is a 4 bit integer. D can
range from 3 to 18. The user can specify values of D for different situations, ie, when the signal magnitude
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
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