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MSP430X47X3_07 Datasheet, PDF (43/76 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
MSP430x47x3, MSP430x47x4
MIXED SIGNAL MICROCONTROLLER
SLAS545A − MAY 2007 − REVISED DECEMBER 2007
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
USCI (UART Mode)
PARAMETER
TEST CONDITIONS
VCC
MIN TYP MAX UNIT
fUSCI
USCI input clock frequency
Internal: SMCLK, ACLK
External: UCLK
Duty Cycle = 50% ± 10%
fSYSTEM MHz
fBITCLK
BITCLK clock frequency
(equals Baudrate in MBaud)
2.2V /3 V
1 MHz
UART receive deglitch time
tτ
(see Note 1)
2.2 V
3V
50 150 600 ns
50 100 600 ns
NOTES: 1. Pulses on the UART receive input (UCxRX) shorter than the UART receive deglich time are suppressed. To ensure that pulses are
correctly recognized their width should exceed the maximum specification of the deglitch time.
USCI (SPI Master Mode, see Figure 21 and Figure 22)
PARAMETER
TEST CONDITIONS
VCC
MIN TYP MAX UNIT
fUSCI
USCI input clock frequency
SMCLK, ACLK
Duty Cycle = 50% ± 10%
fSYSTEM MHz
tSU,MI
SOMI input data setup time
2.2 V
110
ns
3V
75
ns
tHD,MI
SOMI input data hold time
2.2 V
0
ns
3V
0
ns
tVALID,MO
SIMO output data valid time
UCLK edge to SIMO valid;
CL = 20 pF
2.2 V
3V
NOTE:
fUCxCLK
+
1
2tLOńHI
with
tLOńHI
w
max(tVALID,MO(USCI)
)
tSU,SI(Slave),
tSU,MI(USCI)
)
t ) VALID,SO(Slave) .
For the slave’s parameters tSU,SI(Slave) and tVALID,SO(Slave) refer to the SPI parameters of the attached slave.
30 ns
20 ns
USCI (SPI Slave Mode, see Figure 23 and Figure 24)
PARAMETER
TEST CONDITIONS
VCC
MIN TYP
tSTE,LEAD
STE lead time
STE low to clock
2.2 V/3 V
50
tSTE,LAG
STE lag time
Last clock to STE high
2.2 V/3 V
10
tSTE,ACC
STE access time
STE low to SOMI data out
2.2 V/3 V
50
tSTE,DIS
STE disable time
STE high to SOMI high impedance
2.2 V/3 V
50
tSU,SI
SIMO input data setup time
2.2 V
20
3V
15
tHD,SI
SIMO input data hold time
2.2 V
10
3V
10
UCLK edge to SOMI valid;
2.2 V
75
tVALID,SO
SOMI output data valid time
CL = 20 pF
3V
50
NOTE:
fUCxCLK
+
1
2tLOńHI
with
tLOńHI
w
max(tVALID,MO(Master)
)
tSU,SI(USCI),
tSU,MI(Master)
)
t ) VALID,SO(USCI) .
For the master’s parameters tSU,MI(Master) and tVALID,MO(Master) refer to the SPI parameters of the attached master.
MAX UNIT
ns
ns
ns
ns
ns
ns
ns
ns
110 ns
75 ns
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