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CDC857 Datasheet, PDF (4/12 Pages) Texas Instruments – 2.5-/3.3-V PHASE-LOCK LOOP CLOCK DRIVERS
CDC857-2, CDC857-3
2.5-/3.3-V PHASE-LOCK LOOP CLOCK DRIVERS
SCAS627A – SEPTEMBER 1999 – DECEMBER 1999
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage range, VCC or AVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
Input voltage range VI (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC +0.5 V
Output voltage range, VO, (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC +0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Output clamp current, IOK (VO < 0 or VO > VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous total output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89°C/W
Storage temperature range Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 4)
MIN NOM
MAX UNIT
Supply voltage, VCC
Analog supply voltage, AVCC
CDC857–2
CDC857–3
2.3
2.7 V
2.3
2.7 V
3
3.6 V
Low–level input voltage, VIL(G)
High–level input voltage, VIH(G)
DC input signal voltage (see Note 5)
Differential input signal voltage, VID
dc
(see Note 6)
ac
Differential cross-point input voltage (see Note 7)
High-level output current, IOH
Low-level output current, IOL
Input slew rate, SR
G input
G input
CLK, FBIN
CLK, FBIN
CLK, FBIN
0.7 × VCC
–0.3
0.35
0.7
VCC/2–0.2
VCC/2
1
0.3 × VCC
VCC+0.3
VCC+0.6
VCC+0.6
VCC/2+0.2
–12
12
V
V
V
V
V
V
mA
mA
V/ns
Operating free-air temperature, TA
0
85 °C
NOTES: 4. Unused inputs must be held high or low to prevent them from floating.
5. DC input signal voltage specifies the allowable dc execution of differential input.
6. Differential input signal voltage specifies the differential voltage |VTR – VCP| required for switching, where VTR is the true input level
and VCP is the complementary input level (see figure 3).
7. Differential cross-point voltage is expected to track variations of VCC and is the voltage at which the differential signals must be
crossing.
4
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