TLC320AD81C Datasheet, PDF (39/47 Pages) Texas Instruments – Stereo Audio Digital Equalizer DC

Main Control Register (MCR)
The serial port for this device is flexible, making it easier to interface with many different compatible systems.
Configuration of the digital audio serial interface is set up through the main control register as shown below.
Bits F0 and F1 allow selection between three different serial data formats (right justified = 00, right
justified = 01, and I²S standard = 10). The output serial port mode set by E0 and E1 must be set to the same
value as the input serial port mode set by F0 and F1. Bits W0 and W1 allow selection between three different
word widths (16-bit word = 00, 18-bit word = 01, and 20-bit word = 10). The SC bit selects 32f_s (0) or 64f_s
(1) bit clock. The FL bit is primarily for use during initialization and is defined in the device initialization
section. See section 2.8 Serial Control Interface for additional information on how to address the main
control register.
Table A–2. Main Control Register (MCR)
C7
C6
C5
C4
C3
C2
C1
C0
FL
SC
E1
E0
F1
F0
W1
W0
1
x
x
x
x
x
x
x
BIT
C(7)
C(6)
C(5,4)
C(3,2)
C(1,0)
Table A–3. Main Control Register (MCR) Description
DESCRIPTOR
FUNCTION
VALUE
FUNCTION
FL
Fast load
0
Normal operating mode
1 (default) Fast load mode
SC
E(1,0)
SCLK frequency
Output serial port mode
0
SCLK = 32 fs
1
SCLK = 64 fs
00
Left justified
01
Right justified
10
I2S
11
Reserved
F(1,0)
Input serial port mode
00
Left justified
01
Right justified
10
I2S
11
Reserved
W(1,0)
Serial port word length
00
16 bit
01
18 bit
10
20 bit
11
Reserved
A–3