TLC320AD81C Datasheet, PDF (18/47 Pages) Texas Instruments – Stereo Audio Digital Equalizer DC

2.8.2 Operation
The 7-bit address for the TLC320AD81C is 01101XX, where X is a programmable address bit. Using the
CS1 and CS2 pins on the device, the two LSB address bits may be programmed. These four addresses are
licensed I²C addresses and will not conflict with other licensed I²C audio devices. To communicate with the
TLC320AD81C, the I²C master must use 01101XX. In addition to the 7-bit device address, subaddresses
are used to direct communication to the proper memory location within the device. A complete table of
subaddresses and control registers is provided in the appendix A, Software Interface. For example, to
change the bass setting to 10-dB gain, section 2.8.2.1, Write Cycle shows how the data is written to the I²C
port:
Table 2–1. I²C Address Byte
I2C ADDRESS
BYTE
A6–A2
CS2(A1) CS1(A0)
R/W†
0x68
01101
0
0
0
0x6A
01101
0
1
0
0x6C
01101
1
0
0
0x6E
01101
1
1
0
† _{The TLC320AD81 is a write only device.}
2.8.2.1 Write Cycle
When writing to a subaddress, the correct number of data bytes must follow in order to complete the write
cycle. For example, if the volume control register with subaddress 04 (hex) is written to, six bytes of data
must follow, otherwise the cycle will be incomplete. The correct number of bytes corresponding to each
subaddress is shown in appendix A, Software Interface.
Start
Slave Address
R/W A
Subaddress
A
Data
A Stop
FUNCTION
Start
Start condition as defined in I2C
DESCRIPTION
Slave Address 0110100 (CS1 = CS2 = 0)
R/W
0 (write)
A
Acknowledgement as defined in I2C (slave)
Sub-Address
00000110 (see appendix A, Software Interface)
Data
Stop
00011100 (see appendix A, Software Interface)
Stop condition as defined in I2C
NOTE: This table applies to serial data (SDA). Serial clock (SCL) information is not shown since the same conditions
apply as well.
2–6