TLC320AD81C Datasheet, PDF (37/47 Pages) Texas Instruments – Stereo Audio Digital Equalizer DC

Appendix A
Software Interface
Table A–1. Register Map
NO. of
REGISTER ADDRESS _BYTES
BYTE DESCRIPTION
Reserved
0x00
MCR
0x01
1 C(7–0)
Reserved
0x02
Reserved
Volume†
0x03
0x04
6 VL(23–16), VL(15–8), VL(7–0), VR(23–16), VR(15–8), VR(7–0)
Treble
0x05
1 T(7–0)
Bass
Mixer 1‡
Mixer 2‡
0x06
0x07
0x08
1 B(7–0)
3 S(23–16), S(15–8), S(7–0)
3 S(23–16), S(15–8), S(7–0)
Reserved
0x09
Left
Biquad 0
Left
Biquad 1‡
Left
Biquad 2‡
Left
Biquad 3‡
Left
Biquad 4‡
Left
Biquad 5‡
Reserved
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
15 B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
15 B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
15 B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
15 B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
15 B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0), A2(23–16), A2(15–8),
A2(7–0)
15 B0(23–16), B0(15–8), B0(7–0), B1(23–16), B1(15–8), B1(7–0), B2(23–16),
B2(15–8), B2(7–0), A1(23–16), A1(15–8), A1(7–0) A2(23–16), A2(15–8),
A2(7–0)
Reserved
0x11
Reserved
0x12
† _{The volume value is a 4.16 coefficient. In order to transmit it over I2C, it is necessary to separate the value into three}
bytes. Byte 2 is the integer part and bytes 1 and 0 are the fractional parts.
‡ _{The mixer gain values and biquad coefficients are 4.20 coefficients. In order to transmit them over I2C, it is necessary}
to separate the value into three bytes. The first nibble of byte 2 is the integer part and the second nibble of byte 2 and
bytes 1 and 0 being the fractional parts.
A–1