English
Language : 

OMAP3515 Datasheet, PDF (37/227 Pages) Texas Instruments – Applications Processor
www.ti.com
OMAP3515/03 Applications Processor
SPRS505 – FEBRUARY 2008
Table 2-2. Ball Characteristics (CUS Pkg.)(1) (continued)
BALL
BOTTOM
[1]
E7
G6
G7
F7
F9
A19
B19
A10
A11
B20
C20
D19
C19
A20
B6
B13
A7
A16
A5
A13
A8
A17
K4
K3
K2
J4
J3
J2
J1
PIN
NAME [3]
sdrc_a10
sdrc_a11
sdrc_a12
sdrc_a13
sdrc_a14
sdrc_ncs0
sdrc_ncs1
sdrc_clk
sdrc_nclk
sdrc_cke0
safe_mode
sdrc_cke1
safe_mode
sdrc_nras
sdrc_ncas
sdrc_nwe
sdrc_dm0
sdrc_dm1
sdrc_dm2
sdrc_dm3
sdrc_dqs0
sdrc_dqs1
sdrc_dqs2
sdrc_dqs3
gpmc_a1
gpio_34
safe_mode
gpmc_a2
gpio_35
safe_mode
gpmc_a3
gpio_36
safe_mode
gpmc_a4
gpio_37
safe_mode
gpmc_a5
gpio_38
safe_mode
gpmc_a6
gpio_39
safe_mode
gpmc_a7
gpio_40
MODE
[4]
0
0
0
0
0
0
0
0
0
0
7
0
7
0
0
0
0
0
0
0
0
0
0
0
0
4
7
0
4
7
0
4
7
0
4
7
0
4
7
0
4
7
0
4
TYPE
[5]
O
O
O
O
O
O
O
IO
O
O
BALL
RESET
STATE
[6]
0
0
0
0
0
1
1
L
1
H
BALL
RESET
REL.
STATE
[7]
0
0
0
0
0
1
1
0
1
1
RESET
REL.
MODE
[8]
0
0
0
0
0
0
0
0
0
7
O
H
1
7
O
1
1
0
O
1
1
0
O
1
1
0
O
0
0
0
O
0
0
0
O
0
0
0
O
0
0
0
IO
L
Z
0
IO
L
Z
0
IO
L
Z
0
IO
L
Z
0
O
L
L
7
IO
O
L
L
7
IO
O
L
L
7
IO
O
L
L
7
IO
O
L
L
7
IO
O
H
H
7
IO
O
H
H
7
IO
POWER [9]
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
VDDS_ MEM
HYS
[10]
No
No
No
No
No
No
No
Yes
No
Yes
Yes
No
No
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
BUFFER
STRENGTH
(mA) [11]
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
PULL
U/D
TYPE
[12]
IO
CELL [13]
NA
NA
NA
NA
NA
NA
NA
PU/ PD
NA
PU/ PD
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
PU/ PD LVCMOS
NA
NA
NA
NA
NA
NA
NA
PU/ PD
PU/ PD
PU/ PD
PU/ PD
PU/ PD
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
PU/ PD LVCMOS
PU/ PD LVCMOS
PU/ PD LVCMOS
PU/ PD LVCMOS
PU/ PD LVCMOS
PU/ PD LVCMOS
Submit Documentation Feedback
TERMINAL DESCRIPTION
37