OMAP3515 Datasheet, PDF (209/227 Pages) Texas Instruments – Applications Processor

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OMAP3515/03 Applications Processor
SPRS505 – FEBRUARY 2008
CLKD
1 or Even
Odd
X
0.5
(trunk[CLKD/2]+1)/CLKD
For details about clock division factor CLKD, see the OMAP35xx ES2.0 Technical Reference Manual (TRM) [literature number
SPRUF98].
(6) The Y parameter is defined as follows.
CLKD
1 or Even
Odd
Y
0.5
(trunk[CLKD/2])/CLKD
For details about clock division factor CLKD, see the OMAP35xx ES2.0 Technical Reference Manual (TRM) [literature number
SPRUF98].
MMC1
MMC2
mmcx_clk
MMC3
MMC4
mmcx_cmd
MMC7
MMC8
mmcx_dat[3:0]
In mmcx, x is equal to 1, 2, or 3.
030-104
Figure 6-57. MMC/SD/SDIO – High-Speed and Standard MMC Modes – Data/Command Receive
MMC1
MMC2
mmcx_clk
MMC5
MMC5
mmcx_cmd
MMC6
MMC6
mmcx_dat[3:0]
In mmcx, x is equal to 1, 2, or 3.
030-105
Figure 6-58. MMC/SD/SDIO – High-Speed and Standard MMC Modes – Data/Command Transmit
6.7.1.4 MMC/SD/SDIO in High-Speed SD Mode
Table 6-118 and Table 6-119 assume testing over the recommended operating conditions and electrical
characteristic conditions.
Table 6-117. MMC/SD/SDIO Timing Conditions – High-Speed SD Mode
High-Speed SD Mode
Input Conditions
t_R
t_F
Output Conditions
C_LOAD
TIMING CONDITION PARAMETER
Input signal rise time
Input signal fall time
Output load capacitance
VALUE
3
3
40
UNIT
ns
ns
pF
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TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS 209