LP3906SQ-JXXI Datasheet, PDF (36/47 Pages) Texas Instruments – Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C ompatible

LP3906
SNVS456M – AUGUST 2006 – REVISED MAY 2013
APPLICATION NOTES
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SYSTEM CLOCK INPUT (SYNC) PIN
Pin 23 of the chip allows for a system clock input in order to synchronize the buck converters in PWM mode. This
is useful if the user wishes to force the bucks to work synchronously with the system. Otherwise, the user should
tie the pin to GND and the bucks will operate on an internal 2 MHz clock.
The signal applied to the SYNC pin must be 13 MHz as per application processor specifications, but we can be
contacted to modify that specification if so desired. Upon inputting the 13 MHz clock signal, the bucks will scale it
down and continue to run at 2 MHz based off the 13 MHz clock.
ANALOG POWER SIGNAL ROUTING
All power inputs should be tied to the main VDD source (i.e. battery), unless the user wishes to power it from
another source. (i.e. external LDO output).
The analog VDD inputs power the internal bias and error amplifiers, so they should be tied to the main VDD. The
analog VDD inputs must have an input voltage between 2.7 and 5.5 V, as specified on pg. 6 of the datasheet.
The other V_INs (V_INLDO1, V_INLDO2, V_IN1, V_IN2) can actually have inputs lower than 2.7V, as long as it's higher
than the programmed output (+0.3V, to be safe).
The analog and digital grounds should be tied together outside of the chip to reduce noise coupling.
COMPONENT SELECTION
Inductors for SW1 and SW2
There are two main considerations when choosing an inductor; the inductor should not saturate and the inductor
current ripple is small enough to achieve the desired output voltage ripple. Care should be taken when reviewing
the different saturation current ratings that are specified by different manufacturers. Saturation current ratings are
typically specified at 25ºC, so ratings at maximum ambient temperature of the application should be requested
from the manufacturer.
There are two methods to choose the inductor saturation current rating:
Method 1
The saturation current is greater than the sum of the maximum load current and the worst case average to peak
inductor current. This can be written as follows:
I_sat > I_outmax + I_ripple
where
I_ripple
=
§¹
©f
·
¹
x
§^VIN ^{- V}OUT·
© 2L ¹
x
§^VOUT·
© VIN ¹
(5)
I_RIPPLE: Average to peak inductor current
I_OUTMAX: Maximum load current
V_IN: Maximum input voltage to the buck
L: Min inductor value including worse case tolerances (30% drop can be considered for method 1)
f: Minimum switching frequency (1.6 MHz)
V_OUT: Buck Output voltage
Method 2
A more conservative and recommended approach is to choose an inductor that has saturation current rating
greater than the maximum current limit of 2375 mA.
Given a peak-to-peak current ripple (I_PP) the inductor needs to be at least:
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