THS7313 Datasheet, PDF (33/48 Pages) Texas Instruments – 3-Channel Low Power SDTV Video Amplifier with I2C Control, 6-dB Gain, SAG Correction, 2:1 Input MUX, and Selectable Input Bias Modes

THS7313
www.ti.com
SLOS483 – NOVEMBER 2005
APPLICATION INFORMATION (continued)
acknowledges data bytes sent by the slave. When the master has received all of the requested data bytes from
the slave, the not acknowledge (A) condition is initiated by the master by keeping the SDA signal high just before
it asserts the stop (P) condition. This sequence terminates a read cycle as shown in Figure 64 and Figure 65.
Note that the THS7313 does not allow multiple read transfers to occur. See example section – Reading from the
THS7313 for more information.
From Receiver
S Slave Address
W A DATA A DATA A P
From Transmitter
Figure 62. I²C Write Cycle
A = No Acknowledge (SDA High)
A = Acknowledge
S = Start Condition
P = Stop Condition
W = Write
R = Read
Start
Condition
Acknowledge
(From Receiver)
Acknowledge
(Receiver)
Acknowledge
(Transmitter)
SDA
A6 A5
A1 A0 R/W ACK D7 D6
D1 D0 ACK
D7 D6
D1 D0 ACK
I²C Device Address and
Read/Write Bit
First Data
Byte
Other
Last Data Byte
Data Bytes
Figure 63. Multiple Byte Write Transfer
Stop
Condition
S Slave Address R A DATA A DATA A P
Transmitter
Receiver
Figure 64. I²C Read Cycle
A = No Acknowledge (SDA High)
A = Acknowledge
S = Start Condition
P = Stop Condition
W = Write
R = Read
Start
Condition
Acknowledge
(From
Receiver)
Acknowledge
(From
Transmitter)
Not
Acknowledge
(Transmitter)
SDA
A6
A0 R/W ACK D7
D0 ACK
D7 D6
D1 D0 ACK
I²C Device Address and
Read/Write Bit
First Data
Byte
Other
Last Data Byte
Data Bytes
Figure 65. Multiple Byte Read Transfer
Stop
Condition
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