THS7313 Datasheet, PDF (25/48 Pages) Texas Instruments – 3-Channel Low Power SDTV Video Amplifier with I2C Control, 6-dB Gain, SAG Correction, 2:1 Input MUX, and Selectable Input Bias Modes

THS7313
www.ti.com
SLOS483 – NOVEMBER 2005
APPLICATION INFORMATION (continued)
OUTPUT MODES OF OPERATION – AC COUPLED
The most common method of coupling the video signal to the line is by using a large capacitor. This capacitor is
typically between 220 µF and 1000 µF, although 470 µF is most common. This value of this capacitor must be
this large to minimize the line tilt (droop) and/or field tilt associated with ac coupling as described previously in
this document. Just like the dc output configuration, connection of the output pin of each channel directly to the
SAG output pin of the corresponding channel should be as close as possible to the output pins of the THS7313.
The most common reason ac coupling is to ensure full interoperability with the receiving video system. This
eliminates possible ground loops. It also ensures that regardless of the reference dc voltage used on the transmit
side, the receive side re-establishes the dc reference voltage to its own requirements.
As with the dc output mode of operation, each line should have a 75-Ω source termination resistor in series with
the ac-coupling capacitor. If 2 lines are to be driven, it is best to have each line use its own capacitor and resistor
rather than sharing these components as shown in Figure 53.This helps ensure line-to-line dc isolation and
potential problems. Using a single 1000-µF capacitor for 2-lines can be done, but there is a chance for ground
loops and interference creation between the two receivers.
470 mF
(See Note A)
+
CVBS
Out 1
3.3 V
DAC /
Encoder CBVS
(THS8200)
R
SDTV
CVBS
S-Video Y’
Y’
S-Video C’
R
480i
576i
G’B’R’
C’
R
CVBS
S-Video Y’
S-Video C’
External
Input
0.1 mF
75 W
0.1 mF
75 W
0.1 mF
75 W
1 NC
NC 20
2 CH.1 IN A CH.1 OUT 19
3 CH.2 IN A CH.1 SAG 18
4 CH.3 IN A CH.2 OUT ¹⁷
5 _{CH.1 IN B} CH.2 SAG 16
6 CH.2 IN B CH.3 OUT 15
7 CH.3 IN B CH.3 SAG 14
8 I2C-A1
9 I2C-A0
10 GND
SCL 13
SDA 12
VS+ 11
0.01 mF
75 W
470 mF
(See Note A)
+
CVBS
Out 2
75 W
470 mF
(Note A)
+
75 W
S-Video 1
0.1 mF
3.3 V
75 W
C’
Out 1
100 mF
75 W
75 W
75 W
470 mF
(Note A)
+
75 W
S-Video 2
0.1 mF
Y’
Out 1
0.1 mF
C’
Out 2
75 W
75 W
2
IC
Controller
A. Due to the high frequency content of the video signal, it is recommended, but not required, to add a 0.01-µF capacitor
in parallel with these large capacitors.
Figure 53. Typical SDTV CVBS/Y'/C' System Driving 2 AC-Coupled Video Lines
Y’
Out 2
75 W
Due to the edge rates and frequencies of operation, it is recommended – but not required – to place a 0.1-µF to
0.01-µF capacitor in parallel with the large 220-µF to 1000-µF capacitors. These large value capacitors are most
commonly aluminum electrolytic. It is known that these capacitors have significantly large equivalent series
resistance (ESR), and their impedance at high frequencies is large due to the associated inductances involved
with their construction. The small 0.1-µF to 0.01-µF capacitors help pass these high frequency (>1 MHz) signals
with lower impedance than the large capacitors.
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