THS7313 Datasheet, PDF (30/48 Pages) Texas Instruments – 3-Channel Low Power SDTV Video Amplifier with I2C Control, 6-dB Gain, SAG Correction, 2:1 Input MUX, and Selectable Input Bias Modes

THS7313
SLOS483 – NOVEMBER 2005
APPLICATION INFORMATION (continued)
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R
(130 W)
DC + 135 mV
THS7303
470 mF
Y’
(See Note A) _{75 W} ^Out
+
DAC /
Encoder
3.3 V
Y’
P’_B
P’_R
R
(130 W)
R
(130 W)
Y’
P’_B
P’_R
0.1 mF
75 W
1 mF
1 _NC
NC 20
2 CH.1 IN A
DC + 135 mV
3 _{CH.2 IN A}
DC + 135 mV
4 _{CH.3 IN A}
AC STC
5 _{CH.1 IN B}
AC Bias
6 CH.2 IN B
AC Bias
7 _{CH.3 IN B}
CH.1 OUT ¹⁹
CH.1 SAG 18
CH.2 OUT 17
CH.2 SAG 16
CH.3 OUT ¹⁵
CH.3 SAG 14
8 I2C-A1
SCL 13
9 I2C-A0
10 _GND
SDA 12
VS+ ¹¹
75 W
1 mF
0.01 mF
2
I C Address = 0101100
470 mF
P’_B
(See Note A)
Out
+
75 W
470 mF
P’_R
(See Note A) _{75 W} Out
+
3.3 V
+
100 mF ₂
IC
Controller
75 W
75 W
75 W
CVBS
S-Video
Y’
External
Input
R
(130 W)
75 W
DC + 135 mV
THS7313
470 mF
(See Note A)
+
75 W
CVBS
Out
S-Video
C’
R
(130 W)
R
(130 W)
CVBS
S-Video Y’
0.1 mF
75 W
0.1 mF
1 NC
NC 20
2 CH.1 IN A
DC + 135 mV
3 _{CH.2 IN A}
DC + 135 mV
4 CH.3 IN A
AC STC
5 _{CH.1 IN B}
AC STC
6 _{CH.2 IN B}
AC Bias
7 _{CH.3 IN B}
CH.1 OUT 19
CH. 1 SAG ¹⁸
CH.2 OUT ¹⁷
CH. 2 SAG 16
CH.3 OUT 15
CH. 3 SAG ¹⁴
+V_S 8 I2C-A1
SCL 13
9 I2C-A0
SDA 12
10 GND
V_S+ 11
75 W
0.1 mF
0.1 mF
2
I C Address = 0101110
S-Video C’
External
Input
75 W
470 mF
(See Note A)
+
75 W
S-Video
0.1 mF
75 W
3.3 V
+
100 mF
2
IC
Controller
75 W
Y’
Out
C’
75 W
Out
75 W
A. Due to the high frequency content of the video signal, it is recommended, but not required, to add a 0.01-µF capacitor
in parallel with these large capacitors.
Figure 57. Typical 6-Channel HDTV and SDTV Encoder Interfacing to a THS7303 and a THS7313
30