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THS6022 Datasheet, PDF (29/38 Pages) Texas Instruments – 250-mA DUAL DIFFERENTIAL LINE DRIVER
THS6022
250-mA DUAL DIFFERENTIAL LINE DRIVER
SLOS225C – SEPTEMBER 1998 – REVISED JANUARY 2000
APPLICATION INFORMATION
PCB design considerations (continued)
OUTPUT AMPLITUDE
vs
FREQUENCY
3
VCC = ±15 V
2 Gain = 1
Ci = 1 pF
RL = 50 Ω
1 VO = 0.2 V
0
–1
–2
–3
C in
–4 VI
–5
Ci = 0 pF
(Stray C Only)
1 kΩ
–
+
VO
50 Ω
50 Ω
OUTPUT AMPLITUDE
vs
FREQUENCY
2
1
Ci = 27 pF
0
VCC = ±15 V
–1 Gain = –1
RL = 50 Ω
–2 VO = 0.2 V
–3
Ci = 0 pF
(Stray C Only)
–4
–5
VI
–6
1 kΩ
50 Ω
C in
1 kΩ
–
+
VO
RL = 50 Ω
–6
100 k
1M
10 M
100 M
f – Frequency – Hz
500 M
–7
100 k
1M
10 M
100 M
f – Frequency – Hz
500 M
Figure 56
Figure 57
D Proper power supply decoupling – Use a minimum of a 6.8-µF tantalum capacitor in parallel with a 0.1-µF
ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several
amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the
supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible
to the supply terminal. As this distance increases, the inductance in the connecting etch makes the capacitor
less effective. The designer should strive for distances of less than 0.1 inches between the device power
terminal and the ceramic capacitors.
Because of its power dissipation, proper thermal management of the THS6022 is required. Although there are
many ways to properly heatsink this device, the following steps illustrate one recommended approach for a
multilayer PCB with an internal ground plane. Refer to Figure 58 for the following steps.
Thermal pad area (0.15 x 0.17) with 6 vias
(Via diameter = 13 mils)
Figure 58. PowerPAD PCB Etch and Via Pattern – Minimum Requirements
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