THS6032 Datasheet, PDF (23/31 Pages) Texas Instruments – LOW-POWER ADSL CENTRAL-OFFICE LINE DRIVER

THS6032
LOW-POWER ADSL CENTRAL-OFFICE LINE DRIVER
SLOS233C – APRIL1999 – REVISED MARCH 2000
APPLICATION INFORMATION
slew rate (continued)
Whether the THS6032 is used in an inverting amplifier configuration or a noninverting configuration can impact
the output slew rate. Slew rate performance in the inverting configuration is generally faster than the
noninverting configuration. This is because in the inverting configuration the input terminals of the amplifier are
at a virtual ground and do not significantly change voltage as the input changes. Consequently, the time to
charge any capacitance on these input nodes is less than for the noninverting configuration, where the input
nodes actually do change in voltage an amount equal to the size of the input step. In addition, any PCB parasitic
capacitance on the input nodes degrades the slew rate further simply because there is more capacitance to
charge. If the main supply voltage V_CC(H) to the amplifier is reduced, slew rate decreases because there is less
current available within the amplifier to charge the capacitance on the input nodes as well as other internal
nodes. Also, as the load resistance decreases, the slew rate typically decreases due to the increasing internal
currents, which slow down the transitions.
Internally, the THS6032 has other factors that impact the slew rate. The amplifier’s behavior during the slew rate
transition varies slightly depending upon the rise time of the input. This is because of the way the input stage
handles faster and faster input edges. Slew rates (as measured at the amplifier output) of less than about
1200 V/µs are processed by the input stage in a very linear fashion. Consequently, the output waveform
smoothly transitions between initial and final voltage levels. For slew rates greater than 1200 V/µs, additional
slew-enhancing transistors present in the input stage (transistors Q5 and Q6 in Figure 44) begin to turn on to
support these faster signals. The result is an amplifier with extremely fast slew rate capabilities. The additional
aberrations present in the output waveform with these faster slewing input signals are due to the brief saturation
of the internal current mirrors. This phenomenon, which typically lasts less than 20 ns, is considered normal
operation and is not detrimental to the device in any way. If for any reason this type of response is not desired,
then increasing the feedback resistor or slowing down the input signal slew rate reduces the effect.
SLEWING 10 V PULSE
8
6
4
2
SR = 1400 V/_µs
0
VCC(H) = ± 15 V
–2
VCC(L) = ± 5 V
Gain = +5
–4
RF = 1.1 kΩ
RL = 25 Ω
–6
TR/TF = 1 ns
–8
0
25 50 75 100 125 150 175 200 225 250
t – Time – ns
Figure 47
SLEWING 20 V PULSE
16
12
8
4
SR = 4000 V/_µs
VCC(H) = ± 15 V
0
VCC(L) = ± 5 V
Gain = +5
–4
RF = 1.1 kΩ
–8
RL = 25 Ω
TR/TF = 1 ns
–12
–16
0
25 50 75 100 125 150 175 200 225 250
t – Time – ns
Figure 48
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