AM1808 Datasheet, PDF (221/264 Pages) Texas Instruments – AM1808 ARM Microprocessor

AM1808
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SPRS653 – FEBRUARY 2010
6.26.1 uPP Register Descriptions
Table 6-115 shows the uPP registers.
BYTE ADDRESS
0x01E1 6000
0x01E1 6004
0x01E1 6008
0x01E1 6010
0x01E1 6014
0x01E1 6018
0x01E1 601C
0x01E1 6020
0x01E1 6024
0x01E1 6028
0x01E1 602C
0x01E1 6030
0x01E1 6040
0x01E1 6044
0x01E1 6048
0x01E1 6050
0x01E1 6054
0x01E1 6058
0x01E1 6060
0x01E1 6064
0x01E1 6068
0x01E1 6070
0x01E1 6074
0x01E1 6078
Table 6-115. Universal Parallel Port (uPP) Registers
ACRONYM
UPPID
UPPCR
UPDLB
UPCTL
UPICR
UPIVR
UPTCR
UPISR
UPIER
UPIES
UPIEC
UPEOI
UPID0
UPID1
UPID2
UPIS0
UPIS1
UPIS2
UPQD0
UPQD1
UPQD2
UPQS0
UPQS1
UPQS2
REGISTER DESCRIPTION
uPP Peripheral Identification Register
uPP Peripheral Control Register
uPP Digital Loopback Register
uPP Channel Control Register
uPP Interface Configuration Register
uPP Interface Idle Value Register
uPP Threshold Configuration Register
uPP Interrupt Raw Status Register
uPP Interrupt Enabled Status Register
uPP Interrupt Enable Set Register
uPP Interrupt Enable Clear Register
uPP End-of-Interrupt Register
uPP DMA Channel I Descriptor 0 Register
uPP DMA Channel I Descriptor 1 Register
uPP DMA Channel I Descriptor 2 Register
uPP DMA Channel I Status 0 Register
uPP DMA Channel I Status 1 Register
uPP DMA Channel I Status 2 Register
uPP DMA Channel Q Descriptor 0 Register
uPP DMA Channel Q Descriptor 1 Register
uPP DMA Channel Q Descriptor 2 Register
uPP DMA Channel Q Status 0 Register
uPP DMA Channel Q Status 1 Register
uPP DMA Channel Q Status 2 Register
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Peripheral Information and Electrical Specifications 221
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